JP2514966Y2 - 多層リードフレーム - Google Patents

多層リードフレーム

Info

Publication number
JP2514966Y2
JP2514966Y2 JP1990050521U JP5052190U JP2514966Y2 JP 2514966 Y2 JP2514966 Y2 JP 2514966Y2 JP 1990050521 U JP1990050521 U JP 1990050521U JP 5052190 U JP5052190 U JP 5052190U JP 2514966 Y2 JP2514966 Y2 JP 2514966Y2
Authority
JP
Japan
Prior art keywords
plane
insulating tape
metal
inner lead
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1990050521U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0410347U (cg-RX-API-DMAC7.html
Inventor
満晴 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP1990050521U priority Critical patent/JP2514966Y2/ja
Publication of JPH0410347U publication Critical patent/JPH0410347U/ja
Application granted granted Critical
Publication of JP2514966Y2 publication Critical patent/JP2514966Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP1990050521U 1990-05-15 1990-05-15 多層リードフレーム Expired - Lifetime JP2514966Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990050521U JP2514966Y2 (ja) 1990-05-15 1990-05-15 多層リードフレーム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990050521U JP2514966Y2 (ja) 1990-05-15 1990-05-15 多層リードフレーム

Publications (2)

Publication Number Publication Date
JPH0410347U JPH0410347U (cg-RX-API-DMAC7.html) 1992-01-29
JP2514966Y2 true JP2514966Y2 (ja) 1996-10-23

Family

ID=31569140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990050521U Expired - Lifetime JP2514966Y2 (ja) 1990-05-15 1990-05-15 多層リードフレーム

Country Status (1)

Country Link
JP (1) JP2514966Y2 (cg-RX-API-DMAC7.html)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55162957U (cg-RX-API-DMAC7.html) * 1979-05-10 1980-11-22
JPS62183156A (ja) * 1986-02-06 1987-08-11 Nec Corp 半導体装置

Also Published As

Publication number Publication date
JPH0410347U (cg-RX-API-DMAC7.html) 1992-01-29

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