JPH0410347U - - Google Patents
Info
- Publication number
- JPH0410347U JPH0410347U JP1990050521U JP5052190U JPH0410347U JP H0410347 U JPH0410347 U JP H0410347U JP 1990050521 U JP1990050521 U JP 1990050521U JP 5052190 U JP5052190 U JP 5052190U JP H0410347 U JPH0410347 U JP H0410347U
- Authority
- JP
- Japan
- Prior art keywords
- insulating tape
- lead frame
- multilayer
- metal plane
- multilayer lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990050521U JP2514966Y2 (ja) | 1990-05-15 | 1990-05-15 | 多層リードフレーム |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990050521U JP2514966Y2 (ja) | 1990-05-15 | 1990-05-15 | 多層リードフレーム |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0410347U true JPH0410347U (cg-RX-API-DMAC7.html) | 1992-01-29 |
| JP2514966Y2 JP2514966Y2 (ja) | 1996-10-23 |
Family
ID=31569140
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990050521U Expired - Lifetime JP2514966Y2 (ja) | 1990-05-15 | 1990-05-15 | 多層リードフレーム |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2514966Y2 (cg-RX-API-DMAC7.html) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55162957U (cg-RX-API-DMAC7.html) * | 1979-05-10 | 1980-11-22 | ||
| JPS62183156A (ja) * | 1986-02-06 | 1987-08-11 | Nec Corp | 半導体装置 |
-
1990
- 1990-05-15 JP JP1990050521U patent/JP2514966Y2/ja not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55162957U (cg-RX-API-DMAC7.html) * | 1979-05-10 | 1980-11-22 | ||
| JPS62183156A (ja) * | 1986-02-06 | 1987-08-11 | Nec Corp | 半導体装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2514966Y2 (ja) | 1996-10-23 |