JP2509092Y2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP2509092Y2
JP2509092Y2 JP1989152868U JP15286889U JP2509092Y2 JP 2509092 Y2 JP2509092 Y2 JP 2509092Y2 JP 1989152868 U JP1989152868 U JP 1989152868U JP 15286889 U JP15286889 U JP 15286889U JP 2509092 Y2 JP2509092 Y2 JP 2509092Y2
Authority
JP
Japan
Prior art keywords
adhesive
diffusion plate
heat diffusion
wiring board
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1989152868U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0392051U (https=
Inventor
久夫 新井
憲司 坊野
幸治 今井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chichibu Fuji Co Ltd
Original Assignee
Chichibu Fuji Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chichibu Fuji Co Ltd filed Critical Chichibu Fuji Co Ltd
Priority to JP1989152868U priority Critical patent/JP2509092Y2/ja
Publication of JPH0392051U publication Critical patent/JPH0392051U/ja
Application granted granted Critical
Publication of JP2509092Y2 publication Critical patent/JP2509092Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/681Shapes or dispositions thereof comprising holes not having chips therein, e.g. for outgassing, underfilling or bond wire passage
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
JP1989152868U 1989-12-29 1989-12-29 半導体装置 Expired - Lifetime JP2509092Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989152868U JP2509092Y2 (ja) 1989-12-29 1989-12-29 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989152868U JP2509092Y2 (ja) 1989-12-29 1989-12-29 半導体装置

Publications (2)

Publication Number Publication Date
JPH0392051U JPH0392051U (https=) 1991-09-19
JP2509092Y2 true JP2509092Y2 (ja) 1996-08-28

Family

ID=31699107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989152868U Expired - Lifetime JP2509092Y2 (ja) 1989-12-29 1989-12-29 半導体装置

Country Status (1)

Country Link
JP (1) JP2509092Y2 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007184351A (ja) * 2006-01-05 2007-07-19 Nec Electronics Corp 半導体装置及びその製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3057986U (ja) * 1998-09-25 1999-06-08 モリト株式会社 スポーツ靴用靴底

Also Published As

Publication number Publication date
JPH0392051U (https=) 1991-09-19

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