KR950701454A - 다중 금속화층을 갖는 무범프 본딩 방법(bumpless bonding process having multilayer metallization) - Google Patents

다중 금속화층을 갖는 무범프 본딩 방법(bumpless bonding process having multilayer metallization)

Info

Publication number
KR950701454A
KR950701454A KR1019940703980A KR19940703980A KR950701454A KR 950701454 A KR950701454 A KR 950701454A KR 1019940703980 A KR1019940703980 A KR 1019940703980A KR 19940703980 A KR19940703980 A KR 19940703980A KR 950701454 A KR950701454 A KR 950701454A
Authority
KR
South Korea
Prior art keywords
layer
forming
gold
input
diffusion barrier
Prior art date
Application number
KR1019940703980A
Other languages
English (en)
Inventor
켄 램
Original Assignee
죠지 페레고스
아트멜 코오포레이숀
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 죠지 페레고스, 아트멜 코오포레이숀 filed Critical 죠지 페레고스
Publication of KR950701454A publication Critical patent/KR950701454A/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H01L21/607—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving the application of mechanical vibrations, e.g. ultrasonic vibrations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05075—Plural internal layers
    • H01L2224/0508—Plural internal layers being stacked
    • H01L2224/05083—Three-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05166—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05171—Chromium [Cr] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/05186—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/05187—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85444—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01024—Chromium [Cr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0494—4th Group
    • H01L2924/04941—TiN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

테이프 자동 본딩 리이드(28)를 집적 회로의 알루미늄 입력/출력패드(10)에 전기 접속하는 방법은 입력/출력패드(10)상에 접착층(16), 확산 장벽층(18) 및 골드층(20)을 후속하여 스퍼터링 하는 단계를 포함한다. 접착층(16)은 패드(10)와 접촉하기 위해 양호한 스텝 범위 및 접착 특성을 갖는 금속막이다. 확산 장벽층(18)은 접착층(16)상부에 형성되고 골드층(20)에 의해 중간에 삽입된다. 본 발명에 따른 방법은 "무범프"기술을 채택하여 본드 리이드(28)는 조합된 압력 및 진동 에너지를 인가하므로써 골드층(20)에 접속된다.
[선택도]제9도

Description

다중 금속화층을 갖는 무범프 본딩 방법(BUMPLESS BONDING PROCESS HAVING MULTILAYER METALLIZATION)
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제9도는 초음파로 본드 리이드가 접합된 제7도의 칩의 측단면도이다.

Claims (17)

  1. 집적 회로를 제공하는 단게와 : 상기 집적회로 상에 전도성 입력/출력 패드를 형성하는 단계와; 입력/출력 패드를 귀금속에 결합시키기 위해 입력/출력 패드상에 전도성 내부층을 형성하는 단계와; 상기 내주층상에 귀금속층을 형성하는 단계와; 리이드단부를 상기 귀금속 층에 접촉시키는 단계를 포함하여 입력/출력 패드에 본드 리이드의 리이드 단부를 초음파로 본딩하는 단계를 포함하는 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  2. 제1항에 있어서, 상기 입력/출력 패드의 형성 단계는 알루미늄 패드 형성 단계인 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  3. 제1항에 있어서, 전도성 내부층 형성 단계는 티타늄-텅스텐, 티타늄, 질화 티타늄, 및 크롬으로 구성된 군으로 부터 금속을 선택하는 단계인 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  4. 제1항에 있어서, 전도성 내부층 형성 단계는 접착층 제조 단계이고, 귀금속층 형성 이전에 접착층 상에 확산 장벽층을 형성하는 단계를 추가로 포함하는 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  5. 제4항에 있어서, 확산 장벽층 형성 단계는 팔라듐 및 니켈로 구성되는 군으로 부터 금속을 선택하는 단계인 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  6. 제1항에 있어서, 귀급속층 형성 단계는 골드층 형성 단계인 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  7. 제1항에 있어서, 귀금속층상에 리이드 단부를 초음파 본딩하는 단계는 상기 입력/출력 패드위에 금속 범프가 없을 때와 리이드 단부상에 금속 범프가 없을 때 수행되는 단계인 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  8. 반도체 기판상에 집적 회로를 제조하는 단계와; 입력/출력 패드가 알루미늄 및 알루미늄 합금으로 구성되는 군으로 부터 선택된 금속으로 제조되도록 집적 회로상에 입력/출력 패드를 형성하는 단계와; 금속 접착층을 입력/출력층 상에 형성하는 단계와; 금속 확산 장벽층을 상기 접착층 상에 형성하는 단계와; 골드층을 상기 확산 장벽층 상에 형성하는 단계와; 본드 리이드의 리이브 단부를 상기 골드층에 접촉시키는 단계와; 상기 리이드 단부가 상기 골드층에 본딩되도록 상기 리이드 단부에 조합된 입력 및 진동 에너지를 인가하는 단계를 포함하는 것을 특징으로 하는 집적회로 및 본드 리이드 전기 접속 방법.
  9. 제8항에 있어서, 상기 접착층, 상기 확산 장벽층 및 골드층을 형성하는 단게는 반도체 기판의 상부 표면과 평행과 치수에 대해 상기 각 층이 평행하도록 이루어지는 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속방법.
  10. 제8항에 있어서, 골드층 형성 단계는 금을 스퍼터링 하는 단계인 것을 특징으로 하는 집적회로 및 본드 리이드 전기 접속 방법.
  11. 제8항에 있어서, 본드 리이드를 구비하는 테이프 자동 본딩 프레임을 제공하는 단계를 추가로 포함하는 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속방법.
  12. 제8항에 있어서, 조합된 압력 및 진동 에너지를 인가하는 단게는 리이드 단부를 골드층에 초음파로 본딩하는 단계인 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  13. 접촉 영역이 있는 집적 회로를 갖는 반도체 기판을 제공하는 단계와; 상기 접촉 영역에 알루미늄 패드를 형성하는 단계와; 알루미늄 패드상에 티타늄을 갖는 막을 스퍼터링하는 단계와; 티타늄막사에서 확산 장벽층을 스퍼터링하는 단게와; 확산 장벽층상에 골드막을 스퍼터링 하는 단계와; 리이드가 골드막과 접촉할 경우 리이드를 진동시키는 단계를 포함하여 테이프 자동 본딩 프레임의 리이드를 스퍼터링된 골두막에 직접 초음파 본딩하는 단계를 포함하는 것을 특징으로 하는 집적 회로및 본드 리이드 전기 접속 방법.
  14. 제13항에 있어서, 사익 초음파 본딩 단계 이전에 티타늄막, 확산 장벽층 및 골드막을 패턴화하는 단계를 추가로 포함하는 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  15. 제13항에 있어서, 티타늄 막은 텅스텐을 구비하는 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  16. 제13항에 있어서, 초음파 본딩 단계는 골드막 위에 리이드를 프레싱하는 단계를 포함하는 것을 특징으로 하는 집적 회로 및 본드 리이드 전기 접속 방법.
  17. 제13항에 있어서, 골드막은 전기 도금 공정이 없을 경우에 형성되는 것을 특징으로 하는 집적회로 및 본드 리이드 전기 접속 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940703980A 1993-03-10 1993-07-14 다중 금속화층을 갖는 무범프 본딩 방법(bumpless bonding process having multilayer metallization) KR950701454A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US029,148 1993-03-10
US08/029,148 US5249728A (en) 1993-03-10 1993-03-10 Bumpless bonding process having multilayer metallization
PCT/US1993/006607 WO1994020983A1 (en) 1993-03-10 1993-07-14 Bumpless bonding process having multilayer metallization

Publications (1)

Publication Number Publication Date
KR950701454A true KR950701454A (ko) 1995-03-23

Family

ID=21847509

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940703980A KR950701454A (ko) 1993-03-10 1993-07-14 다중 금속화층을 갖는 무범프 본딩 방법(bumpless bonding process having multilayer metallization)

Country Status (5)

Country Link
US (1) US5249728A (ko)
EP (1) EP0640245A4 (ko)
JP (1) JPH07506702A (ko)
KR (1) KR950701454A (ko)
WO (1) WO1994020983A1 (ko)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5384284A (en) * 1993-10-01 1995-01-24 Micron Semiconductor, Inc. Method to form a low resistant bond pad interconnect
US5677203A (en) * 1993-12-15 1997-10-14 Chip Supply, Inc. Method for providing known good bare semiconductor die
MY115336A (en) * 1994-02-18 2003-05-31 Ericsson Telefon Ab L M Electromigration resistant metallization structures and process for microcircuit interconnections with rf-reactively sputtered titanium tungsten and gold
US5596226A (en) * 1994-09-06 1997-01-21 International Business Machines Corporation Semiconductor chip having a chip metal layer and a transfer metal and corresponding electronic module
US5823390A (en) * 1995-10-06 1998-10-20 Technical Concepts, L.P. Chemical dispensing apparatus having a pivotal actuator
JPH09330934A (ja) * 1996-06-12 1997-12-22 Toshiba Corp 半導体装置及びその製造方法
US5795818A (en) * 1996-12-06 1998-08-18 Amkor Technology, Inc. Integrated circuit chip to substrate interconnection and method
US5910644A (en) * 1997-06-11 1999-06-08 International Business Machines Corporation Universal surface finish for DCA, SMT and pad on pad interconnections
DE19734434C1 (de) 1997-08-08 1998-12-10 Siemens Ag Halbleiterkörper mit Rückseitenmetallisierung und Verfahren zu deren Herstellung
US6759597B1 (en) * 1998-02-02 2004-07-06 International Business Machines Corporation Wire bonding to dual metal covered pad surfaces
US6632292B1 (en) 1998-03-13 2003-10-14 Semitool, Inc. Selective treatment of microelectronic workpiece surfaces
US6423642B1 (en) 1998-03-13 2002-07-23 Semitool, Inc. Reactor for processing a semiconductor wafer
US5897341A (en) * 1998-07-02 1999-04-27 Fujitsu Limited Diffusion bonded interconnect
US6621703B2 (en) * 1998-10-07 2003-09-16 Electro-Dyn Electronics Corporation Automotive bridge rectifier assembly with thermal protection
US7217325B2 (en) * 1999-01-22 2007-05-15 Semitool, Inc. System for processing a workpiece
US6511901B1 (en) 1999-11-05 2003-01-28 Atmel Corporation Metal redistribution layer having solderable pads and wire bondable pads
US6724078B1 (en) * 2000-08-31 2004-04-20 Intel Corporation Electronic assembly comprising solderable thermal interface
US6742248B2 (en) * 2001-05-14 2004-06-01 The Boeing Company Method of forming a soldered electrical connection
US6593222B2 (en) * 2001-09-07 2003-07-15 Lattice Corporation Method to improve the reliability of thermosonic gold to aluminum wire bonds
EP2273543A3 (en) * 2001-12-14 2011-10-26 STMicroelectronics S.r.l. Semiconductor electronic device and method of manufacturing thereof
US6914332B2 (en) * 2002-01-25 2005-07-05 Texas Instruments Incorporated Flip-chip without bumps and polymer for board assembly
US7910471B2 (en) * 2004-02-02 2011-03-22 Texas Instruments Incorporated Bumpless wafer scale device and board assembly
US7713861B2 (en) * 2007-10-13 2010-05-11 Wan-Ling Yu Method of forming metallic bump and seal for semiconductor device
US8889995B2 (en) * 2011-03-03 2014-11-18 Skyworks Solutions, Inc. Wire bond pad system and method
US9679869B2 (en) 2011-09-02 2017-06-13 Skyworks Solutions, Inc. Transmission line for high performance radio frequency applications
CN104410373B (zh) 2012-06-14 2016-03-09 西凯渥资讯处理科技公司 包含相关系统、装置及方法的功率放大器模块
KR20140043955A (ko) * 2012-09-21 2014-04-14 삼성전기주식회사 전극 패드, 이를 이용한 인쇄 회로 기판 및 그의 제조 방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL159822B (nl) * 1969-01-02 1979-03-15 Philips Nv Halfgeleiderinrichting.
GB1506164A (en) * 1974-07-09 1978-04-05 Mullard Ltd Ultrasonic bonding apparatus
JPS615562A (ja) * 1984-06-20 1986-01-11 Hitachi Ltd 半導体装置
US4917286A (en) * 1987-05-20 1990-04-17 Hewlett-Packard Company Bonding method for bumpless beam lead tape
US4950866A (en) * 1987-12-08 1990-08-21 Hitachi, Ltd. Method and apparatus of bonding insulated and coated wire
US4842662A (en) * 1988-06-01 1989-06-27 Hewlett-Packard Company Process for bonding integrated circuit components
US4927505A (en) * 1988-07-05 1990-05-22 Motorola Inc. Metallization scheme providing adhesion and barrier properties
US4893742A (en) * 1988-12-21 1990-01-16 Hughes Aircraft Company Ultrasonic laser soldering
JPH02285638A (ja) * 1989-04-27 1990-11-22 Toshiba Corp 半導体装置
JP2540652B2 (ja) * 1990-06-01 1996-10-09 株式会社東芝 半導体装置
US5110034A (en) * 1990-08-30 1992-05-05 Quantum Magnetics, Inc. Superconducting bonds for thin film devices
US5136364A (en) * 1991-06-12 1992-08-04 National Semiconductor Corporation Semiconductor die sealing

Also Published As

Publication number Publication date
WO1994020983A1 (en) 1994-09-15
US5249728A (en) 1993-10-05
EP0640245A4 (en) 1995-12-13
JPH07506702A (ja) 1995-07-20
EP0640245A1 (en) 1995-03-01

Similar Documents

Publication Publication Date Title
KR950701454A (ko) 다중 금속화층을 갖는 무범프 본딩 방법(bumpless bonding process having multilayer metallization)
US5536973A (en) Semiconductor device including a semiconductor element mounted on a substrate using bump-shaped connecting electrodes
US5994212A (en) Semiconductor device and method of manufacturing the same
KR910014996A (ko) 집적회로 땜납 다이-접착 설계 및 방법
US5298793A (en) Semiconductor device including an electrode
JPH11234082A (ja) 表面弾性波装置
JP2968051B2 (ja) 半導体素子にばね接触子を実装するチップ相互接続キャリア及び方法
JPH09306949A (ja) 複合バンプへのテープ自動化結合方法
JPS6290957A (ja) 半導体装置の製造方法
EP0827190A3 (en) Bump structure and methods for forming this structure
JP3160555B2 (ja) 半導体装置およびその製造方法
JP2000021935A (ja) 電子部品実装体及びその製造方法
JPH03274755A (ja) 樹脂封止半導体装置とその製造方法
US20030080832A1 (en) Single chip scale package
JPH09252020A (ja) 半導体装置およびその製造方法
JP2748759B2 (ja) フィルムキャリアテープの製造方法
JP2000323528A (ja) 半導体装置の製造方法
JP3036291B2 (ja) 半導体装置の実装構造
JP3382316B2 (ja) 半導体実装構造及び半導体実装方法
JPH1197599A (ja) リードフレームおよびその製造方法
JPS5824014B2 (ja) 実装体の製造方法
JP2000131170A (ja) 圧力センサの実装方法
KR970008523A (ko) 반도체 패키지 히트싱크구조
JPS6316632A (ja) 半導体装置の製造方法
JPH08236682A (ja) リードフレーム

Legal Events

Date Code Title Description
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid