JP2024533137A5 - - Google Patents
Info
- Publication number
- JP2024533137A5 JP2024533137A5 JP2024513825A JP2024513825A JP2024533137A5 JP 2024533137 A5 JP2024533137 A5 JP 2024533137A5 JP 2024513825 A JP2024513825 A JP 2024513825A JP 2024513825 A JP2024513825 A JP 2024513825A JP 2024533137 A5 JP2024533137 A5 JP 2024533137A5
- Authority
- JP
- Japan
- Prior art keywords
- void
- metal
- voids
- die
- metal structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US17/470,961 US20230076844A1 (en) | 2021-09-09 | 2021-09-09 | Semiconductor die module packages with void-defined sections in a metal structure(s) in a package substrate to reduce die-substrate mechanical stress, and related methods |
| US17/470,961 | 2021-09-09 | ||
| PCT/US2022/073351 WO2023039312A1 (en) | 2021-09-09 | 2022-07-01 | Semiconductor die module packages with void-defined sections in a metal structure(s) in a package substrate to reduce die-substrate mechanical stress, and related methods |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2024533137A JP2024533137A (ja) | 2024-09-12 |
| JP2024533137A5 true JP2024533137A5 (enExample) | 2025-06-11 |
Family
ID=83050029
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024513825A Pending JP2024533137A (ja) | 2021-09-09 | 2022-07-01 | ダイ－基板間の機械的応力を低減するためにパッケージ基板の金属構造（単数又は複数）内にボイド画定部分を有する、半導体ダイモジュールパッケージ、及び関連する方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20230076844A1 (enExample) |
| EP (1) | EP4399744A1 (enExample) |
| JP (1) | JP2024533137A (enExample) |
| KR (1) | KR20240057407A (enExample) |
| CN (1) | CN117836937A (enExample) |
| TW (1) | TW202312416A (enExample) |
| WO (1) | WO2023039312A1 (enExample) |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6175158B1 (en) * | 1998-09-08 | 2001-01-16 | Lucent Technologies Inc. | Interposer for recessed flip-chip package |
| JP2003168848A (ja) * | 2001-11-30 | 2003-06-13 | Nec Kansai Ltd | 配線基板 |
| JP2009500830A (ja) * | 2005-06-30 | 2009-01-08 | サンディスク コーポレイション | 封止された集積回路パッケージにおける歪みを減らす方法 |
| US20100263914A1 (en) * | 2009-04-16 | 2010-10-21 | Qualcomm Incorporated | Floating Metal Elements in a Package Substrate |
| US9659884B2 (en) * | 2015-08-14 | 2017-05-23 | Powertech Technology Inc. | Carrier substrate |
| US9978699B1 (en) * | 2017-04-07 | 2018-05-22 | Dr Technology Consulting Company, Ltd. | Three-dimensional complementary-conducting-strip structure |
| JP7357436B2 (ja) * | 2017-04-10 | 2023-10-06 | 日東電工株式会社 | 撮像素子実装基板、その製造方法、および、実装基板集合体 |
| JP7407498B2 (ja) * | 2017-09-15 | 2024-01-04 | 日東電工株式会社 | 配線回路基板およびその製造方法 |
-
2021
- 2021-09-09 US US17/470,961 patent/US20230076844A1/en active Pending
-
2022
- 2022-07-01 TW TW111124694A patent/TW202312416A/zh unknown
- 2022-07-01 JP JP2024513825A patent/JP2024533137A/ja active Pending
- 2022-07-01 EP EP22758384.6A patent/EP4399744A1/en active Pending
- 2022-07-01 WO PCT/US2022/073351 patent/WO2023039312A1/en not_active Ceased
- 2022-07-01 CN CN202280056728.9A patent/CN117836937A/zh active Pending
- 2022-07-01 KR KR1020247006857A patent/KR20240057407A/ko active Pending
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