JP2022537656A5 - - Google Patents

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Publication number
JP2022537656A5
JP2022537656A5 JP2021572092A JP2021572092A JP2022537656A5 JP 2022537656 A5 JP2022537656 A5 JP 2022537656A5 JP 2021572092 A JP2021572092 A JP 2021572092A JP 2021572092 A JP2021572092 A JP 2021572092A JP 2022537656 A5 JP2022537656 A5 JP 2022537656A5
Authority
JP
Japan
Prior art keywords
metal layer
groove
cover metal
substrate side
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2021572092A
Other languages
English (en)
Japanese (ja)
Other versions
JP2022537656A (ja
Filing date
Publication date
Priority claimed from DE102019209889.4A external-priority patent/DE102019209889A1/de
Application filed filed Critical
Publication of JP2022537656A publication Critical patent/JP2022537656A/ja
Publication of JP2022537656A5 publication Critical patent/JP2022537656A5/ja
Pending legal-status Critical Current

Links

JP2021572092A 2019-07-04 2020-06-18 印刷回路板を製造するための方法、及びかかる方法に従って製造された印刷回路板 Pending JP2022537656A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102019209889.4 2019-07-04
DE102019209889.4A DE102019209889A1 (de) 2019-07-04 2019-07-04 Verfahren zur Leiterplattenherstellung sowie gemäß dem Verfahren hergestellte Leiterplatten
PCT/EP2020/067042 WO2021001167A1 (de) 2019-07-04 2020-06-18 VERFAHREN ZUR LEITERPLATTENHERSTELLUNG SOWIE GEMÄß DEM VERFAHREN HERGESTELLTE LEITERPLATTEN

Publications (2)

Publication Number Publication Date
JP2022537656A JP2022537656A (ja) 2022-08-29
JP2022537656A5 true JP2022537656A5 (enExample) 2023-04-26

Family

ID=71120168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021572092A Pending JP2022537656A (ja) 2019-07-04 2020-06-18 印刷回路板を製造するための方法、及びかかる方法に従って製造された印刷回路板

Country Status (8)

Country Link
US (1) US20220361341A1 (enExample)
EP (1) EP3994963A1 (enExample)
JP (1) JP2022537656A (enExample)
KR (1) KR20220030279A (enExample)
CN (1) CN114009154A (enExample)
DE (1) DE102019209889A1 (enExample)
TW (1) TWI873155B (enExample)
WO (1) WO2021001167A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102021209939A1 (de) 2021-09-08 2023-03-09 Gebr. Schmid Gmbh Verfahren zur Leiterplattenherstellung und Leiterplatte
CN115884494A (zh) * 2021-09-28 2023-03-31 深南电路股份有限公司 一种线路内埋方法及线路内埋pcb板
CN114725026A (zh) * 2022-03-04 2022-07-08 苏州链芯半导体科技有限公司 一种叠加先进塑料的柔性无芯3d印刷集成电路模压工艺
CN114745845B (zh) * 2022-04-30 2023-08-08 苏州浪潮智能科技有限公司 一种印刷电路板及制造方法
DE102023116529A1 (de) 2023-06-23 2024-12-24 Gebr. Schmid Gmbh Verfahren zur Leiterplattenherstellung
DE102024125859A1 (de) * 2024-09-09 2026-03-12 Gebr. Schmid Gmbh Verfahren zur Herstellung mehrschichtiger Substrate mit einer integrierten Leiterstruktur und gemäss dem Verfahren herstellbare mehrschichtige Substrate

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3373256D1 (en) * 1983-05-19 1987-10-01 Ibm Deutschland Process for manufacturing printed circuits with metallic conductor patterns embedded in the isolating substrate
JPH0724328B2 (ja) * 1989-07-03 1995-03-15 ポリプラスチックス株式会社 精密細線回路用成形品の製造方法
US5173442A (en) * 1990-07-23 1992-12-22 Microelectronics And Computer Technology Corporation Methods of forming channels and vias in insulating layers
US5244538A (en) * 1991-07-26 1993-09-14 Microelectronics And Computer Technology Corporation Method of patterning metal on a substrate using direct-write deposition of a mask
JP3361556B2 (ja) * 1992-09-25 2003-01-07 日本メクトロン株式会社 回路配線パタ−ンの形成法
JPH07240568A (ja) * 1994-02-28 1995-09-12 Mitsubishi Electric Corp 回路基板およびその製造方法
JP3726500B2 (ja) * 1997-07-28 2005-12-14 株式会社日立製作所 配線板及びその製造方法並びに無電解めっき方法
US6518160B1 (en) * 1998-02-05 2003-02-11 Tessera, Inc. Method of manufacturing connection components using a plasma patterned mask
US7091589B2 (en) * 2002-12-11 2006-08-15 Dai Nippon Printing Co., Ltd. Multilayer wiring board and manufacture method thereof
JP2005332928A (ja) * 2004-05-19 2005-12-02 Sumitomo Heavy Ind Ltd プリント配線板の製造方法
US20060127686A1 (en) * 2004-12-15 2006-06-15 Meloni Paul A Thermally conductive polyimide film composites having high thermal conductivity useful in an electronic device
TWI253714B (en) * 2004-12-21 2006-04-21 Phoenix Prec Technology Corp Method for fabricating a multi-layer circuit board with fine pitch
KR101022914B1 (ko) * 2008-11-04 2011-03-16 삼성전기주식회사 인쇄회로기판의 제조방법
JP5892157B2 (ja) * 2011-03-25 2016-03-23 住友ベークライト株式会社 プリント配線基板、プリント配線基板の製造方法および半導体装置
KR101267277B1 (ko) * 2011-05-19 2013-05-24 한국기계연구원 유연기판의 금속배선 형성방법
CN102315163A (zh) * 2011-09-28 2012-01-11 上海华力微电子有限公司 超低介电常数薄膜铜互连的制作方法
US20140027163A1 (en) * 2012-07-30 2014-01-30 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and method for manufacturing the same
JP6044592B2 (ja) * 2014-05-29 2016-12-14 トヨタ自動車株式会社 多層配線基板及びその製造方法

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