JP2021061453A5 - - Google Patents

Download PDF

Info

Publication number
JP2021061453A5
JP2021061453A5 JP2021008342A JP2021008342A JP2021061453A5 JP 2021061453 A5 JP2021061453 A5 JP 2021061453A5 JP 2021008342 A JP2021008342 A JP 2021008342A JP 2021008342 A JP2021008342 A JP 2021008342A JP 2021061453 A5 JP2021061453 A5 JP 2021061453A5
Authority
JP
Japan
Prior art keywords
semiconductor device
contact pad
wire bond
dielectric layer
package structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2021008342A
Other languages
English (en)
Japanese (ja)
Other versions
JP2021061453A (ja
JP7254840B2 (ja
Filing date
Publication date
Priority claimed from US14/512,562 external-priority patent/US9613843B2/en
Application filed filed Critical
Publication of JP2021061453A publication Critical patent/JP2021061453A/ja
Publication of JP2021061453A5 publication Critical patent/JP2021061453A5/ja
Priority to JP2023052419A priority Critical patent/JP7704383B2/ja
Application granted granted Critical
Publication of JP7254840B2 publication Critical patent/JP7254840B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2021008342A 2014-10-13 2021-01-22 ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法 Active JP7254840B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2023052419A JP7704383B2 (ja) 2014-10-13 2023-03-28 ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/512,562 US9613843B2 (en) 2014-10-13 2014-10-13 Power overlay structure having wirebonds and method of manufacturing same
US14/512,562 2014-10-13

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2015198983A Division JP2016082230A (ja) 2014-10-13 2015-10-07 ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2023052419A Division JP7704383B2 (ja) 2014-10-13 2023-03-28 ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法

Publications (3)

Publication Number Publication Date
JP2021061453A JP2021061453A (ja) 2021-04-15
JP2021061453A5 true JP2021061453A5 (https=) 2021-05-27
JP7254840B2 JP7254840B2 (ja) 2023-04-10

Family

ID=54293117

Family Applications (3)

Application Number Title Priority Date Filing Date
JP2015198983A Pending JP2016082230A (ja) 2014-10-13 2015-10-07 ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法
JP2021008342A Active JP7254840B2 (ja) 2014-10-13 2021-01-22 ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法
JP2023052419A Active JP7704383B2 (ja) 2014-10-13 2023-03-28 ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP2015198983A Pending JP2016082230A (ja) 2014-10-13 2015-10-07 ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2023052419A Active JP7704383B2 (ja) 2014-10-13 2023-03-28 ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法

Country Status (6)

Country Link
US (2) US9613843B2 (https=)
EP (1) EP3010038A3 (https=)
JP (3) JP2016082230A (https=)
KR (1) KR102419302B1 (https=)
CN (3) CN105514077B (https=)
TW (1) TWI713470B (https=)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9613843B2 (en) * 2014-10-13 2017-04-04 General Electric Company Power overlay structure having wirebonds and method of manufacturing same
DE102015102535B4 (de) * 2015-02-23 2023-08-03 Infineon Technologies Ag Verbundsystem und Verfahren zum haftenden Verbinden eines hygroskopischen Materials
US10056319B2 (en) * 2016-04-29 2018-08-21 Delta Electronics, Inc. Power module package having patterned insulation metal substrate
JP6726112B2 (ja) * 2017-01-19 2020-07-22 株式会社 日立パワーデバイス 半導体装置および電力変換装置
JP7163054B2 (ja) * 2017-04-20 2022-10-31 ローム株式会社 半導体装置
US10541209B2 (en) 2017-08-03 2020-01-21 General Electric Company Electronics package including integrated electromagnetic interference shield and method of manufacturing thereof
US10804115B2 (en) 2017-08-03 2020-10-13 General Electric Company Electronics package with integrated interconnect structure and method of manufacturing thereof
US10541153B2 (en) 2017-08-03 2020-01-21 General Electric Company Electronics package with integrated interconnect structure and method of manufacturing thereof
US10332832B2 (en) 2017-08-07 2019-06-25 General Electric Company Method of manufacturing an electronics package using device-last or device-almost last placement
USD881189S1 (en) 2018-02-26 2020-04-14 Samsung Electronics Co., Ltd. Head-mounted display device
US10957832B2 (en) 2018-10-22 2021-03-23 General Electric Company Electronics package for light emitting semiconductor devices and method of manufacturing thereof
US11538769B2 (en) 2018-12-14 2022-12-27 General Electric Company High voltage semiconductor devices having improved electric field suppression
US10892237B2 (en) * 2018-12-14 2021-01-12 General Electric Company Methods of fabricating high voltage semiconductor devices having improved electric field suppression
JP7472435B2 (ja) 2019-05-13 2024-04-23 富士電機株式会社 半導体モジュールの製造方法
CN111162015A (zh) * 2019-12-20 2020-05-15 珠海格力电器股份有限公司 一种智能功率模块及封装方法
US11776870B2 (en) * 2020-01-16 2023-10-03 Semiconductor Components Industries, Llc Direct bonded copper substrates fabricated using silver sintering
US11398445B2 (en) 2020-05-29 2022-07-26 General Electric Company Mechanical punched via formation in electronics package and electronics package formed thereby
DE112020007480T5 (de) * 2020-08-03 2023-05-17 Mitsubishi Electric Corporation Halbleitereinheit, herstellungsverfahren für dieselbe und leistungswandler
EP4012753A1 (en) * 2020-12-08 2022-06-15 Hitachi Energy Switzerland AG Semiconductor device, semiconductor module and manufacturing method
CN112910285B (zh) * 2021-01-05 2022-06-14 深圳市富鑫产业科技有限公司 一种逆变器电力系统及其制造方法
US11848244B2 (en) * 2021-09-30 2023-12-19 Texas Instruments Incorporated Leaded wafer chip scale packages
WO2026009326A1 (ja) * 2024-07-02 2026-01-08 三菱電機株式会社 半導体装置及び電力変換装置

Family Cites Families (65)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2599893B1 (fr) * 1986-05-23 1996-08-02 Ricoh Kk Procede de montage d'un module electronique sur un substrat et carte a circuit integre
DE69330603T2 (de) * 1993-09-30 2002-07-04 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, Catania Verfahren zur Metallisierung und Verbindung bei der Herstellung von Leistungshalbleiterbauelementen
US5637922A (en) * 1994-02-07 1997-06-10 General Electric Company Wireless radio frequency power semiconductor devices using high density interconnect
JP3432284B2 (ja) * 1994-07-04 2003-08-04 三菱電機株式会社 半導体装置
JPH08213420A (ja) * 1995-02-03 1996-08-20 Hitachi Ltd 半導体装置
JPH0933940A (ja) * 1995-07-14 1997-02-07 Citizen Watch Co Ltd 表示パネル駆動用半導体チップの実装構造
DE19612838A1 (de) * 1995-11-13 1997-05-15 Asea Brown Boveri Leistungshalbleiterbauelement sowie Verfahren zu dessen Herstellung
JP3415981B2 (ja) * 1996-01-10 2003-06-09 株式会社日立製作所 半導体装置、その製造方法、および表面保護膜
US6057612A (en) * 1998-07-02 2000-05-02 Intersil Corporation Flat power pack
US6440641B1 (en) * 1998-07-31 2002-08-27 Kulicke & Soffa Holdings, Inc. Deposited thin film build-up layer dimensions as a method of relieving stress in high density interconnect printed wiring board substrates
US6232151B1 (en) * 1999-11-01 2001-05-15 General Electric Company Power electronic module packaging
DE60109339T2 (de) 2000-03-24 2006-01-12 Texas Instruments Incorporated, Dallas Verfahren zum Drahtbonden
FR2822591A1 (fr) * 2001-03-22 2002-09-27 Commissariat Energie Atomique Assemblage de composants d'epaisseurs diverses
JP3719994B2 (ja) * 2001-12-28 2005-11-24 株式会社東芝 半導体装置
JP2003347741A (ja) * 2002-05-30 2003-12-05 Taiyo Yuden Co Ltd 複合多層基板およびそれを用いたモジュール
US6979891B2 (en) * 2003-09-08 2005-12-27 Intel Corporation Integrated circuit packaging architecture
US6995475B2 (en) * 2003-09-18 2006-02-07 International Business Machines Corporation I/C chip suitable for wire bonding
FI117814B (fi) * 2004-06-15 2007-02-28 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
DE102004043020B3 (de) 2004-09-06 2006-04-27 eupec Europäische Gesellschaft für Leistungshalbleiter mbH Bonddraht und Bondverbindung
JP4674522B2 (ja) * 2004-11-11 2011-04-20 株式会社デンソー 半導体装置
US7327024B2 (en) * 2004-11-24 2008-02-05 General Electric Company Power module, and phase leg assembly
JP4710700B2 (ja) * 2005-05-09 2011-06-29 株式会社デンソー 半導体装置およびその製造方法
JP2007073611A (ja) * 2005-09-05 2007-03-22 Renesas Technology Corp 電子装置およびその製造方法
JP2007109932A (ja) * 2005-10-14 2007-04-26 Toshiba Corp 半導体装置
US8164176B2 (en) * 2006-10-20 2012-04-24 Infineon Technologies Ag Semiconductor module arrangement
US20080190748A1 (en) * 2007-02-13 2008-08-14 Stephen Daley Arthur Power overlay structure for mems devices and method for making power overlay structure for mems devices
US7884452B2 (en) * 2007-11-23 2011-02-08 Alpha And Omega Semiconductor Incorporated Semiconductor power device package having a lead frame-based integrated inductor
US8039302B2 (en) * 2007-12-07 2011-10-18 Stats Chippac, Ltd. Semiconductor package and method of forming similar structure for top and bottom bonding pads
US7800239B2 (en) * 2007-12-14 2010-09-21 Semiconductor Components Industries, Llc Thick metal interconnect with metal pad caps at selective sites and process for making the same
US7960845B2 (en) 2008-01-03 2011-06-14 Linear Technology Corporation Flexible contactless wire bonding structure and methodology for semiconductor device
US7839642B2 (en) * 2008-04-04 2010-11-23 Liebert Corporation Heat-sink brace for fault-force support
JP5331610B2 (ja) * 2008-12-03 2013-10-30 ルネサスエレクトロニクス株式会社 半導体集積回路装置
US9064936B2 (en) * 2008-12-12 2015-06-23 Stats Chippac, Ltd. Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP
US8592992B2 (en) * 2011-12-14 2013-11-26 Stats Chippac, Ltd. Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSP
US7915741B2 (en) * 2009-02-24 2011-03-29 Unisem Advanced Technologies Sdn. Bhd. Solder bump UBM structure
US8358000B2 (en) * 2009-03-13 2013-01-22 General Electric Company Double side cooled power module with power overlay
TW201113993A (en) * 2009-10-01 2011-04-16 Anpec Electronics Corp Pre-packaged structure
EP2328172B1 (en) 2009-10-02 2019-06-26 Abb Research Ltd. A power-electronic arrangement
US8242013B2 (en) * 2010-03-30 2012-08-14 Alpha & Omega Semiconductor Inc. Virtually substrate-less composite power semiconductor device and method
JP2011222555A (ja) * 2010-04-02 2011-11-04 Denso Corp 半導体チップ内蔵配線基板の製造方法
JP5568357B2 (ja) * 2010-04-05 2014-08-06 株式会社フジクラ 半導体装置及びその製造方法
US8531027B2 (en) * 2010-04-30 2013-09-10 General Electric Company Press-pack module with power overlay interconnection
JP5607994B2 (ja) * 2010-06-15 2014-10-15 ルネサスエレクトロニクス株式会社 半導体集積回路装置およびその製造方法
US8114712B1 (en) * 2010-12-22 2012-02-14 General Electric Company Method for fabricating a semiconductor device package
US10204879B2 (en) * 2011-01-21 2019-02-12 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming wafer-level interconnect structures with advanced dielectric characteristics
WO2011137733A2 (zh) * 2011-04-29 2011-11-10 华为技术有限公司 电源模块及其封装集成方法
TWI489601B (zh) * 2011-05-03 2015-06-21 財團法人工業技術研究院 電子元件封裝結構
US8653635B2 (en) * 2011-08-16 2014-02-18 General Electric Company Power overlay structure with leadframe connections
US9066443B2 (en) * 2011-09-13 2015-06-23 General Electric Company Overlay circuit structure for interconnecting light emitting semiconductors
US9385009B2 (en) * 2011-09-23 2016-07-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming stacked vias within interconnect structure for Fo-WLCSP
US8716870B2 (en) * 2011-12-16 2014-05-06 General Electric Company Direct write interconnections and method of manufacturing thereof
US20130154099A1 (en) 2011-12-16 2013-06-20 Semiconductor Components Industries, Llc Pad over interconnect pad structure design
US8907467B2 (en) * 2012-03-28 2014-12-09 Infineon Technologies Ag PCB based RF-power package window frame
US9147628B2 (en) 2012-06-27 2015-09-29 Infineon Technoloiges Austria AG Package-in-packages and methods of formation thereof
US9337163B2 (en) * 2012-11-13 2016-05-10 General Electric Company Low profile surface mount package with isolated tab
US8872328B2 (en) * 2012-12-19 2014-10-28 General Electric Company Integrated power module package
US8987876B2 (en) 2013-03-14 2015-03-24 General Electric Company Power overlay structure and method of making same
US10418298B2 (en) * 2013-09-24 2019-09-17 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming dual fan-out semiconductor package
US9806051B2 (en) * 2014-03-04 2017-10-31 General Electric Company Ultra-thin embedded semiconductor device package and method of manufacturing thereof
US9978700B2 (en) * 2014-06-16 2018-05-22 STATS ChipPAC Pte. Ltd. Method for building up a fan-out RDL structure with fine pitch line-width and line-spacing
US20150364430A1 (en) * 2014-06-16 2015-12-17 Stats Chippac, Ltd. Semiconductor Device and Method of Forming a Dampening Structure to Improve Board Level Reliability
US10804153B2 (en) * 2014-06-16 2020-10-13 STATS ChipPAC Pte. Ltd. Semiconductor device and method to minimize stress on stack via
US9613843B2 (en) * 2014-10-13 2017-04-04 General Electric Company Power overlay structure having wirebonds and method of manufacturing same
US9941207B2 (en) * 2014-10-24 2018-04-10 STATS ChipPAC Pte. Ltd. Semiconductor device and method of fabricating 3D package with short cycle time and high yield
US10453786B2 (en) * 2016-01-19 2019-10-22 General Electric Company Power electronics package and method of manufacturing thereof

Similar Documents

Publication Publication Date Title
JP2021061453A5 (https=)
KR100881199B1 (ko) 관통전극을 구비하는 반도체 장치 및 이를 제조하는 방법
TWI473218B (zh) 穿孔中介板及其製法與封裝基板及其製法
CN105514077B (zh) 具有引线接合件的功率覆层结构和制造其的方法
US20220359425A1 (en) Semiconductor device package and method of manufacturing the same
TW201344866A (zh) 中介片、其製造方法、及堆疊式封裝裝置
US20190333850A1 (en) Wiring board having bridging element straddling over interfaces
KR101095373B1 (ko) 장벽층을 갖는 범프를 포함하는 반도체칩 및 그 제조방법
TW201628145A (zh) 電子封裝結構及其製法
KR970077573A (ko) 도금된 구리 상부 표면 레벨 상호 접속을 갖는 집적 회로를 위한 플라스틱 캡슐화
TW200409173A (en) Semiconductor device
TWI816300B (zh) 半導體裝置及其製造方法
US9899300B2 (en) Semiconductor device
TWI425886B (zh) 嵌埋有電子元件之封裝結構及其製法
US20170309599A1 (en) Semiconductor device
CN107799476B (zh) 具有挡止件的封装基板及感测器封装结构
KR101354750B1 (ko) 반도체 디바이스 및 그 제조 방법
TWI797669B (zh) 半導體裝置以及半導體裝置的製造方法
CN115362549A (zh) 电子设备、半导体晶片、芯片封装结构及其制作方法
KR20250096898A (ko) 반도체 패키지
KR102825929B1 (ko) 반도체 패키지
TWI260078B (en) Chip structure
JP7189846B2 (ja) 半導体装置の製造方法および金属の積層方法
JP2015142009A (ja) 半導体装置
KR102863703B1 (ko) 재배선층을 갖는 반도체 칩을 포함하는 반도체 패키지