KR970077573A - 도금된 구리 상부 표면 레벨 상호 접속을 갖는 집적 회로를 위한 플라스틱 캡슐화 - Google Patents
도금된 구리 상부 표면 레벨 상호 접속을 갖는 집적 회로를 위한 플라스틱 캡슐화 Download PDFInfo
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- KR970077573A KR970077573A KR1019970022513A KR19970022513A KR970077573A KR 970077573 A KR970077573 A KR 970077573A KR 1019970022513 A KR1019970022513 A KR 1019970022513A KR 19970022513 A KR19970022513 A KR 19970022513A KR 970077573 A KR970077573 A KR 970077573A
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- copper
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- surface level
- interconnect material
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
플라스틱 팩키지 직접 회로는 구리로 두껍게 도금된 상부 표면 레벨 상호 접속 구조를 갖는다. 반도체 기판의 표면에 장치들을 갖는 반도체 집적 회로가 형성된다. 제1 및 제2금속화 층들은 기판 위에 형성되고 상기 장치들의 선택된 장치들과 접촉한다. 금속화의 제1 및 제2레벨들은 다른 관통 비아들과 접촉할 수 있다. 그러면 두꺼운 상부 레벨 금속 상호 접속층은 제2금속층 위에 형성되는데, 물리적으로 접촉하거나 선택적으로 전기적으로 접촉한다. 표면 레벨 금속은 높은 도전성 구리층으로 제조된다. 두꺼운 표면 레벨 금속층은 장치의 상호 접속 금속화의 저항을 실질적으로 낮추고, 전류 디바이어싱과 종래 기술의 집적 회로에서 경험된 조기의 고장 문제들을 제거한다. 한 실시예에서, 구리 표면 레벨 상호 접속층은 결합 배선을 받을 수 있는 재료의 얇은 장벽층으로 코팅된다. 전체 구조는 플라스틱 구리 상호 접속 재료와 물리적으로 접촉하도록 플라스틱 팩키지 내에서 캡슐화된다. 구리 상호 접속 금속과의 물리적 접촉으로 플라스틱 팩키지를 사용하는 것은 종래 기술의 패시베이션층들에 대한 필요성을 제거한다. 다른 장치들과 방법들이 설명된다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 두꺼운 구리 상부 표면 금속층을 갖고 본 발명의 방법과 장치를 이용하여 플라스틱 패키지로 캡슐화된 집적 회로의 제1실시예의 횡단면도.
Claims (22)
- 플라스틱 팩키지 집적 회로에 잇어서, 그 내부에 장치들이 형성되어 있는 실리콘 기판; 상기 장치들 위에 적어도 부분적으로 놓이고 상기 장치들과 전기적으로 접촉하는 도금된 구리 상부 표면 레벨 상호 접속 재료의 표면층; 및 상기 실리콘 기판과 상기 도금된 구리 표면 레벨 상호 접속 재료의 상기 층주의에 형성되고 상기 구리 표면 레벨 상호 접속 재료와 물리적으로 접촉하는 플라스틱 팩키지를 포함하는 것을 특징으로 하는 플라스틱 팩키지 직접 회로.
- 제1항에 있어서, 상기 구리 상부 표면 레벨 상호 접속 재료 위에 형성된 재료의 도금된 장벽층; 및 결합 배선의 한 단부에서 배선 결합에 의해 상기 재료의 장벽층에 결합되는 적어도 한 개의 결합 배선을 더 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 제2항에 있어서, 플라스틱 팩키지의 외부에서부터 플라스틱 팩키지로 연장되는 리드를 갖는 리드프레임을 더 포함하고, 상기 적어도 하나의 결합 배선의 각각은 상기 리드프레임의 리드에도 결합되는 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 제2항에 있어서, 상기 도금된 장벽 금속이 니켈 및 니켈 합금의 그룹으로부터 채택된 금속을 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 제2항에 있어서, 상기 도금된 장벽 금속이 팔라디움 및 팔라디움 합금의 그룹으로부터 채택된 금속을 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 제1항에 있어서, 상기 도금된 구리 상부 표면 레벨 상호 접속 재료의 두께가 적어도 10미크론인 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 제1항에 있어서, 상기 도금된 구리 상부 표면 레벨 상호 접속 재료의 두께가 적어도 20미크론인 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 제1항에 있어서, 상기 도금된 구리 상부 표면 레벨 상호 접속 재료의 두께가 5미크론보다 큰 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 제1항에 있어서, 상기 실리콘 기판 위에 놓이고 상기 구리 상호 접속 재료를 상기 장치들에 전기적으로 결합시키는 구리를 제외한 상호 접속 재료의 적어도 하나의 레벨을 더 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 제1항에 있어서, 상기 구리 상부 표면 레벨 상호 접속 재료를 제외하고 상호 접속의 적어도 하나의 레벨내에 형성되는 적어도 하나의 결합 패드를 더 포함하고, 상기 결합 패드가 상기 구리 상부 표면 레벨 상호 접속 재료로부터 일정 간격을 두고 분리되는 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 제10항에 있어서, 상기 결합 배선이 배선 결합에 의해서 상기 적어도 하나의 결합 패드에 결합되는 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 제10항에 있어서, 복수의 리드들을 갖는 리드프레임을 포함하고, 상기 리드들이 플라스틱 팩키지의 외부로부터 상기 플라스틱 팩키지로 연장되는, 상기 결합 배선이 상기 리드프레임의 적어도 하나의 리드에 결합되는 것을 특징으로 하는 플라스틱 팩키지 집적 회로.
- 플라스틱 팩키지 집적 회로를 제조하는 방법에 있어서, 실리콘 기판의 표면에 장치들을 형성하는 단계; 상기 장치들 위에 적어도 부분적으로 놓이고 상기 장치들과 전기적으로 접촉하는 구리 상부 표면 레벨 상호 접속 재료를 도금하는 단계; 및 상기 실리콘 기판과 상기 구리 상부 표면 레벨 상호 접속 재료 주위에 상기 구리 상부 표면 레벨 상호 접속 재료와 물리적으로 접촉하는 플라스틱 팩키지를 형성하는 단계를 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로를 제조하는 방법.
- 제13항에 있어서, 장벽층을 상호 접속 재료의 상기 구리 상부 표면 레벨의 상부 표면 위에 놓는 단계; 및 적어도 하나의 결합 배선을 상기 재료의 장벽층에 결합시키는 단계를 더 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로를 제조하는 방법.
- 제14항에 있어서, 플라스틱 팩키지의 외부로부터 플라스틱 팩키지로 연장되는 리드를 갖는 리드프레임을 제공하는 단계; 및 각각의 상기 적어도 하나의 결합 배선들을 상기 리드프레임의 적어도 하나의 리드에 결합시키는 단계를 더 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로를 제조하는 방법.
- 제14항에 있어서, 상기 실리콘 기판과 상호 접속 재료의 상기 도금된 구리 상부 표면 레벨 사이의 구리를 제외한 재료의 상호 접속의 적어도 하나의 레벨을 형성하는 단계; 및 구리를 제외한 재료의 상호 접속의 상기 적어도 하나의 레벨내에 형성되는 적어도 하나의 결합 패드를 제공하되, 상기 결합 패드가 상호 접속 재료의 상기 구리 레벨로부터 일정 간격을 두고 분리되는 단계를 더 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로를 제조하는 방법.
- 제16항에 있어서, 배선 결합을 상기 적어도 하나의 결합 패드에 형성시킴으로써 결합 배선을 상기 적어도 하나의 결합 패드에 결합시키는 단계를 더 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로를 제조하는 방법.
- 제17항에 있어서, 플라스틱 팩키지의 외부로부터 플라스틱 팩키지로 연장되는 복수의 리드프레임을 제공하는 단계; 및 상기 결합 배선을 상기 리드프레임의 적어도 하나의 리드에 결합시키는 단계를 더 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로를 제조하는 방법.
- 제16항에 있어서, 구리를 제외한 상호 접속 재료의 적어도 하나의 레벨을 형성하는 단계가 알루미늄을 포함하는 제1 및 제2상호 접속 재료들을 형성하는 단계를 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로를 제조하는 방법.
- 제14항에 있어서, 상호 접속 재료의 구리 상부 표면 레벨을 형성하는 상기 단계가 적어도 5미크론 두께의 구리층을 형성하는 단계를 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로를 제조하는 방법.
- 제14항에 있어서, 상호 접속 재료의 구리 상부 표면 레벨을 형성하는 상기 단계가 10미크론보다 두껍게 구리층을 형성하는 단계를 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적 회로를 제조하는 방법.
- 제14항에 있어서, 상호 접속 재료의 구리 상부 표면 레벨을 형성하는 상기 단계가 20미크론보다 두껍게 구리층을 형성하는 단계를 포함하는 것을 특징으로 하는 플라스틱 팩키지 집적회로를 제조하는 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
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US1876096P | 1996-05-31 | 1996-05-31 | |
US60/018,760 | 1996-05-31 |
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KR970077573A true KR970077573A (ko) | 1997-12-12 |
KR100521820B1 KR100521820B1 (ko) | 2006-01-27 |
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KR1019970022513A KR100521820B1 (ko) | 1996-05-31 | 1997-05-31 | 도금된구리상부표면레벨상호접속을갖는집적회로를위한플라스틱캡슐화 |
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US (1) | US6140702A (ko) |
JP (1) | JP3862362B2 (ko) |
KR (1) | KR100521820B1 (ko) |
TW (1) | TW349250B (ko) |
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US8282846B2 (en) * | 2010-02-27 | 2012-10-09 | National Semiconductor Corporation | Metal interconnect structure with a side wall spacer that protects an ARC layer and a bond pad from corrosion and method of forming the metal interconnect structure |
US9437589B2 (en) * | 2014-03-25 | 2016-09-06 | Infineon Technologies Ag | Protection devices |
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US20170018448A1 (en) | 2015-07-15 | 2017-01-19 | Chip Solutions, LLC | Semiconductor device and method |
US10586746B2 (en) | 2016-01-14 | 2020-03-10 | Chip Solutions, LLC | Semiconductor device and method |
WO2017123870A1 (en) * | 2016-01-14 | 2017-07-20 | Chip Solutions, LLC | Releasable carrier and method |
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JPS594050A (ja) * | 1982-06-30 | 1984-01-10 | Fujitsu Ltd | 半導体装置 |
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JPS63148646A (ja) * | 1986-12-12 | 1988-06-21 | Toshiba Corp | 半導体装置 |
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1997
- 1997-05-28 US US08/864,386 patent/US6140702A/en not_active Expired - Lifetime
- 1997-05-30 JP JP14268497A patent/JP3862362B2/ja not_active Expired - Fee Related
- 1997-05-31 KR KR1019970022513A patent/KR100521820B1/ko active IP Right Grant
- 1997-07-02 TW TW086107667A patent/TW349250B/zh not_active IP Right Cessation
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JP3862362B2 (ja) | 2006-12-27 |
US6140702A (en) | 2000-10-31 |
TW349250B (en) | 1999-01-01 |
JPH1056031A (ja) | 1998-02-24 |
KR100521820B1 (ko) | 2006-01-27 |
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