JP2020522128A5 - - Google Patents

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Publication number
JP2020522128A5
JP2020522128A5 JP2019564442A JP2019564442A JP2020522128A5 JP 2020522128 A5 JP2020522128 A5 JP 2020522128A5 JP 2019564442 A JP2019564442 A JP 2019564442A JP 2019564442 A JP2019564442 A JP 2019564442A JP 2020522128 A5 JP2020522128 A5 JP 2020522128A5
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JP
Japan
Prior art keywords
superconducting metal
substrate
superconducting
silicon
vias
Prior art date
Application number
JP2019564442A
Other languages
English (en)
Japanese (ja)
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JP7182834B2 (ja
JPWO2018219484A5 (https=
JP2020522128A (ja
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Priority claimed from US15/609,860 external-priority patent/US10157842B1/en
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Publication of JP2020522128A5 publication Critical patent/JP2020522128A5/ja
Publication of JPWO2018219484A5 publication Critical patent/JPWO2018219484A5/ja
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JP2019564442A 2017-05-31 2017-12-07 超伝導金属シリコン貫通ビアを有する半導体デバイスのための製造方法および構造 Active JP7182834B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/609,860 2017-05-31
US15/609,860 US10157842B1 (en) 2017-05-31 2017-05-31 Semiconductor device including superconducting metal through-silicon-vias and method of manufacturing the same
PCT/EP2017/081792 WO2018219484A1 (en) 2017-05-31 2017-12-07 Superconducting metal through-silicon-vias

Publications (4)

Publication Number Publication Date
JP2020522128A JP2020522128A (ja) 2020-07-27
JP2020522128A5 true JP2020522128A5 (https=) 2022-02-22
JPWO2018219484A5 JPWO2018219484A5 (https=) 2022-02-22
JP7182834B2 JP7182834B2 (ja) 2022-12-05

Family

ID=60627639

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2019564442A Active JP7182834B2 (ja) 2017-05-31 2017-12-07 超伝導金属シリコン貫通ビアを有する半導体デバイスのための製造方法および構造

Country Status (6)

Country Link
US (3) US10157842B1 (https=)
EP (1) EP3639295B1 (https=)
JP (1) JP7182834B2 (https=)
CN (1) CN110622297B (https=)
ES (1) ES2960054T3 (https=)
WO (1) WO2018219484A1 (https=)

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US9971970B1 (en) * 2015-04-27 2018-05-15 Rigetti & Co, Inc. Microwave integrated quantum circuits with VIAS and methods for making the same
US11121301B1 (en) 2017-06-19 2021-09-14 Rigetti & Co, Inc. Microwave integrated quantum circuits with cap wafers and their methods of manufacture
US10741742B2 (en) * 2018-02-28 2020-08-11 The Regents Of The University Of Colorado, A Body Corporate Enhanced superconducting transition temperature in electroplated rhenium
US11158781B2 (en) 2019-11-27 2021-10-26 International Business Machines Corporation Permanent wafer handlers with through silicon vias for thermalization and qubit modification
US20210280765A1 (en) * 2020-03-06 2021-09-09 The Board Of Trustees Of The University Of Alabama Superconducting carrier and cables for quantum device chips and method of fabrication
CN112420604B (zh) * 2020-11-20 2022-12-06 中国科学院半导体研究所 一种基于热压键合的tsv垂直电学互连器件的制备方法
US12033981B2 (en) 2020-12-16 2024-07-09 International Business Machines Corporation Create a protected layer for interconnects and devices in a packaged quantum structure
FI20215520A1 (en) * 2021-05-04 2022-11-05 Iqm Finland Oy Superconducting vias in the substrate
CN118339566A (zh) 2021-06-11 2024-07-12 西克公司 针对超导量子电路的通量偏置的系统和方法
CN115000286A (zh) * 2022-07-13 2022-09-02 材料科学姑苏实验室 一种晶圆孔道填充方法、填充装置、转接片和用途
CN117460398B (zh) * 2023-10-30 2026-01-13 本源量子计算科技(合肥)股份有限公司 超导线路及其制造方法
JP2026028554A (ja) 2024-08-07 2026-02-20 富士通株式会社 デバイスの製造方法及びデバイス

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CA1329952C (en) * 1987-04-27 1994-05-31 Yoshihiko Imanaka Multi-layer superconducting circuit substrate and process for manufacturing same
EP0358879A3 (en) * 1988-09-13 1991-02-27 Hewlett-Packard Company Method of making high density interconnects
EP0612114B1 (en) * 1993-02-15 1997-05-14 Sumitomo Electric Industries, Ltd. Method for forming a patterned oxide superconductor thin film
US6100194A (en) 1998-06-22 2000-08-08 Stmicroelectronics, Inc. Silver metallization by damascene method
US6228675B1 (en) 1999-07-23 2001-05-08 Agilent Technologies, Inc. Microcap wafer-level package with vias
SG111972A1 (en) 2002-10-17 2005-06-29 Agency Science Tech & Res Wafer-level package for micro-electro-mechanical systems
US8084695B2 (en) 2007-01-10 2011-12-27 Hsu Hsiuan-Ju Via structure for improving signal integrity
KR100975652B1 (ko) * 2007-10-05 2010-08-17 한국과학기술원 아연 및 아연합금을 이용한 비아 및 그의 형성 방법, 그를3차원 다중 칩 스택 패키지 제조 방법
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JP2011026680A (ja) 2009-07-28 2011-02-10 Renesas Electronics Corp 半導体装置の製造方法及び半導体装置の製造装置
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