JP2019525476A5 - - Google Patents

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Publication number
JP2019525476A5
JP2019525476A5 JP2019505480A JP2019505480A JP2019525476A5 JP 2019525476 A5 JP2019525476 A5 JP 2019525476A5 JP 2019505480 A JP2019505480 A JP 2019505480A JP 2019505480 A JP2019505480 A JP 2019505480A JP 2019525476 A5 JP2019525476 A5 JP 2019525476A5
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JP
Japan
Prior art keywords
layer
metallization
backside
depositing
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2019505480A
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English (en)
Japanese (ja)
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JP2019525476A (ja
JP6921180B2 (ja
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Publication date
Priority claimed from US15/240,952 external-priority patent/US9847293B1/en
Application filed filed Critical
Publication of JP2019525476A publication Critical patent/JP2019525476A/ja
Publication of JP2019525476A5 publication Critical patent/JP2019525476A5/ja
Application granted granted Critical
Publication of JP6921180B2 publication Critical patent/JP6921180B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2019505480A 2016-08-18 2017-07-14 デュアル側面接触キャパシタを形成するための裏面シリサイド化の利用 Expired - Fee Related JP6921180B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/240,952 2016-08-18
US15/240,952 US9847293B1 (en) 2016-08-18 2016-08-18 Utilization of backside silicidation to form dual side contacted capacitor
PCT/US2017/042213 WO2018034756A1 (en) 2016-08-18 2017-07-14 Utilization of backside silicidation to form dual side contacted capacitor

Publications (3)

Publication Number Publication Date
JP2019525476A JP2019525476A (ja) 2019-09-05
JP2019525476A5 true JP2019525476A5 (https=) 2020-08-13
JP6921180B2 JP6921180B2 (ja) 2021-08-18

Family

ID=59416818

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2019505480A Expired - Fee Related JP6921180B2 (ja) 2016-08-18 2017-07-14 デュアル側面接触キャパシタを形成するための裏面シリサイド化の利用

Country Status (7)

Country Link
US (2) US9847293B1 (https=)
EP (1) EP3501045A1 (https=)
JP (1) JP6921180B2 (https=)
KR (1) KR20190039714A (https=)
CN (1) CN109690788A (https=)
BR (1) BR112019002750B1 (https=)
WO (1) WO2018034756A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9847293B1 (en) 2016-08-18 2017-12-19 Qualcomm Incorporated Utilization of backside silicidation to form dual side contacted capacitor
US12575111B2 (en) * 2022-06-30 2026-03-10 Intel Corporation Back-end-of-line 2D memory cell

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JPH08222701A (ja) * 1995-02-17 1996-08-30 Asahi Chem Ind Co Ltd キャパシタを有する半導体装置およびその製造方法
US6320237B1 (en) 1999-11-08 2001-11-20 International Business Machines Corporation Decoupling capacitor structure
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SE527487C2 (sv) 2004-03-02 2006-03-21 Infineon Technologies Ag En metod för framställning av en kondensator och en monolitiskt integrerad krets innefattande en sådan kondensator
JP2005260163A (ja) 2004-03-15 2005-09-22 Fujitsu Ltd 容量素子及びその製造方法並びに半導体装置及びその製造方法
US20050280087A1 (en) * 2004-06-16 2005-12-22 Cree Microwave, Inc. Laterally diffused MOS transistor having source capacitor and gate shield
US7064043B1 (en) 2004-12-09 2006-06-20 Texas Instruments Incorporated Wafer bonded MOS decoupling capacitor
US20060170044A1 (en) 2005-01-31 2006-08-03 Taiwan Semiconductor Manufacturing Co., Ltd. One-transistor random access memory technology integrated with silicon-on-insulator process
US7345334B2 (en) 2005-04-27 2008-03-18 International Business Machines Corporation Integrated circuit (IC) with high-Q on-chip discrete capacitors
US7709313B2 (en) 2005-07-19 2010-05-04 International Business Machines Corporation High performance capacitors in planar back gates CMOS
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US20090057742A1 (en) 2007-08-30 2009-03-05 Sungjae Lee Cmos varactor
CN101952961B (zh) * 2008-02-25 2013-01-30 飞兆半导体公司 包括集成薄膜电感器的微模块及其制造方法
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JP5876249B2 (ja) * 2011-08-10 2016-03-02 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
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US8685790B2 (en) * 2012-02-15 2014-04-01 Freescale Semiconductor, Inc. Semiconductor device package having backside contact and method for manufacturing
JP6216235B2 (ja) * 2013-05-07 2017-10-18 キヤノン株式会社 画像形成装置及びその制御方法とプログラム
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US9847293B1 (en) 2016-08-18 2017-12-19 Qualcomm Incorporated Utilization of backside silicidation to form dual side contacted capacitor

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