BR112019002750B1 - Estrutura de circuito integrado, método de construção de uma estrutura de circuito integrado e módulo de extremidade anterior de frequência de rádio - Google Patents

Estrutura de circuito integrado, método de construção de uma estrutura de circuito integrado e módulo de extremidade anterior de frequência de rádio Download PDF

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Publication number
BR112019002750B1
BR112019002750B1 BR112019002750-5A BR112019002750A BR112019002750B1 BR 112019002750 B1 BR112019002750 B1 BR 112019002750B1 BR 112019002750 A BR112019002750 A BR 112019002750A BR 112019002750 B1 BR112019002750 B1 BR 112019002750B1
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BR
Brazil
Prior art keywords
layer
backside
plating
capacitor
metallization
Prior art date
Application number
BR112019002750-5A
Other languages
English (en)
Portuguese (pt)
Other versions
BR112019002750A2 (pt
Inventor
Sinan Goktepeli
Plamen Vassilev Kolev
Michael Andrew Stuber
Richard Hammond
Shiqun Gu
Steve Fanelli
Original Assignee
Qualcomm Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Incorporated filed Critical Qualcomm Incorporated
Publication of BR112019002750A2 publication Critical patent/BR112019002750A2/pt
Publication of BR112019002750B1 publication Critical patent/BR112019002750B1/pt

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435—Cross-sectional shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/01—Manufacture or treatment
    • H10D1/045—Manufacture or treatment of capacitors having potential barriers, e.g. varactors
    • H10D1/047—Manufacture or treatment of capacitors having potential barriers, e.g. varactors of conductor-insulator-semiconductor capacitors, e.g. trench capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/62—Capacitors having potential barriers
    • H10D1/66—Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/495—Capacitive arrangements or effects of, or between wiring layers
    • H10W20/496—Capacitor integral with wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H10W44/241—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF] for passive devices or passive elements
    • H10W44/248—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF] for passive devices or passive elements for antennas

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
BR112019002750-5A 2016-08-18 2017-07-14 Estrutura de circuito integrado, método de construção de uma estrutura de circuito integrado e módulo de extremidade anterior de frequência de rádio BR112019002750B1 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/240,952 2016-08-18
US15/240,952 US9847293B1 (en) 2016-08-18 2016-08-18 Utilization of backside silicidation to form dual side contacted capacitor
PCT/US2017/042213 WO2018034756A1 (en) 2016-08-18 2017-07-14 Utilization of backside silicidation to form dual side contacted capacitor

Publications (2)

Publication Number Publication Date
BR112019002750A2 BR112019002750A2 (pt) 2019-05-14
BR112019002750B1 true BR112019002750B1 (pt) 2023-04-11

Family

ID=59416818

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112019002750-5A BR112019002750B1 (pt) 2016-08-18 2017-07-14 Estrutura de circuito integrado, método de construção de uma estrutura de circuito integrado e módulo de extremidade anterior de frequência de rádio

Country Status (7)

Country Link
US (2) US9847293B1 (https=)
EP (1) EP3501045A1 (https=)
JP (1) JP6921180B2 (https=)
KR (1) KR20190039714A (https=)
CN (1) CN109690788A (https=)
BR (1) BR112019002750B1 (https=)
WO (1) WO2018034756A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9847293B1 (en) 2016-08-18 2017-12-19 Qualcomm Incorporated Utilization of backside silicidation to form dual side contacted capacitor
US12575111B2 (en) * 2022-06-30 2026-03-10 Intel Corporation Back-end-of-line 2D memory cell

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JP3326267B2 (ja) 1994-03-01 2002-09-17 三菱電機株式会社 半導体装置およびその製造方法
US5541442A (en) * 1994-08-31 1996-07-30 International Business Machines Corporation Integrated compact capacitor-resistor/inductor configuration
JPH08222701A (ja) * 1995-02-17 1996-08-30 Asahi Chem Ind Co Ltd キャパシタを有する半導体装置およびその製造方法
US6320237B1 (en) 1999-11-08 2001-11-20 International Business Machines Corporation Decoupling capacitor structure
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JP2005260163A (ja) 2004-03-15 2005-09-22 Fujitsu Ltd 容量素子及びその製造方法並びに半導体装置及びその製造方法
US20050280087A1 (en) * 2004-06-16 2005-12-22 Cree Microwave, Inc. Laterally diffused MOS transistor having source capacitor and gate shield
US7064043B1 (en) 2004-12-09 2006-06-20 Texas Instruments Incorporated Wafer bonded MOS decoupling capacitor
US20060170044A1 (en) 2005-01-31 2006-08-03 Taiwan Semiconductor Manufacturing Co., Ltd. One-transistor random access memory technology integrated with silicon-on-insulator process
US7345334B2 (en) 2005-04-27 2008-03-18 International Business Machines Corporation Integrated circuit (IC) with high-Q on-chip discrete capacitors
US7709313B2 (en) 2005-07-19 2010-05-04 International Business Machines Corporation High performance capacitors in planar back gates CMOS
US8013342B2 (en) * 2007-11-14 2011-09-06 International Business Machines Corporation Double-sided integrated circuit chips
US20090057742A1 (en) 2007-08-30 2009-03-05 Sungjae Lee Cmos varactor
CN101952961B (zh) * 2008-02-25 2013-01-30 飞兆半导体公司 包括集成薄膜电感器的微模块及其制造方法
US8889548B2 (en) * 2008-09-30 2014-11-18 Infineon Technologies Ag On-chip RF shields with backside redistribution lines
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US9847293B1 (en) 2016-08-18 2017-12-19 Qualcomm Incorporated Utilization of backside silicidation to form dual side contacted capacitor

Also Published As

Publication number Publication date
US20180076137A1 (en) 2018-03-15
US9847293B1 (en) 2017-12-19
WO2018034756A1 (en) 2018-02-22
EP3501045A1 (en) 2019-06-26
CN109690788A (zh) 2019-04-26
BR112019002750A2 (pt) 2019-05-14
KR20190039714A (ko) 2019-04-15
US10290579B2 (en) 2019-05-14
JP2019525476A (ja) 2019-09-05
JP6921180B2 (ja) 2021-08-18

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Legal Events

Date Code Title Description
B350 Update of information on the portal [chapter 15.35 patent gazette]
B06W Patent application suspended after preliminary examination (for patents with searches from other patent authorities) chapter 6.23 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

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