JP2019186265A - 基板処理システム、基板処理方法、プログラム及びコンピュータ記憶媒体 - Google Patents

基板処理システム、基板処理方法、プログラム及びコンピュータ記憶媒体 Download PDF

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Publication number
JP2019186265A
JP2019186265A JP2018071298A JP2018071298A JP2019186265A JP 2019186265 A JP2019186265 A JP 2019186265A JP 2018071298 A JP2018071298 A JP 2018071298A JP 2018071298 A JP2018071298 A JP 2018071298A JP 2019186265 A JP2019186265 A JP 2019186265A
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substrate
processed
adhesive member
support substrate
support
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JP2018071298A
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Japanese (ja)
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JP2019186265A5 (ko
Inventor
田村　武
Takeshi Tamura
武 田村
太一 森
Taichi Mori
太一 森
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Priority to JP2018071298A priority Critical patent/JP2019186265A/ja
Priority to KR1020190027591A priority patent/KR20190116056A/ko
Publication of JP2019186265A publication Critical patent/JP2019186265A/ja
Publication of JP2019186265A5 publication Critical patent/JP2019186265A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02013—Grinding, lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
JP2018071298A 2018-04-03 2018-04-03 基板処理システム、基板処理方法、プログラム及びコンピュータ記憶媒体 Pending JP2019186265A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2018071298A JP2019186265A (ja) 2018-04-03 2018-04-03 基板処理システム、基板処理方法、プログラム及びコンピュータ記憶媒体
KR1020190027591A KR20190116056A (ko) 2018-04-03 2019-03-11 기판 처리 시스템, 기판 처리 방법 및 기억 매체

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2018071298A JP2019186265A (ja) 2018-04-03 2018-04-03 基板処理システム、基板処理方法、プログラム及びコンピュータ記憶媒体

Publications (2)

Publication Number Publication Date
JP2019186265A true JP2019186265A (ja) 2019-10-24
JP2019186265A5 JP2019186265A5 (ko) 2021-05-06

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JP2018071298A Pending JP2019186265A (ja) 2018-04-03 2018-04-03 基板処理システム、基板処理方法、プログラム及びコンピュータ記憶媒体

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JP (1) JP2019186265A (ko)
KR (1) KR20190116056A (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021077712A (ja) * 2019-11-06 2021-05-20 富士電機株式会社 半導体素子の製造方法
WO2023238809A1 (ja) * 2022-06-08 2023-12-14 タツモ株式会社 接合装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102321016B1 (ko) * 2020-01-13 2021-11-03 (주)제이쓰리 반도체 웨이퍼 형상을 제어하는 웨이퍼 가공기술

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006509376A (ja) * 2002-12-09 2006-03-16 コミサリヤ・ア・レネルジ・アトミク 応力下の構造体の組立により複合構造体を作製する方法
JP2013058569A (ja) * 2011-09-07 2013-03-28 Tokyo Electron Ltd 接合方法、プログラム、コンピュータ記憶媒体及び接合システム
JP2014226749A (ja) * 2013-05-22 2014-12-08 株式会社ディスコ 研削方法
JP2016210075A (ja) * 2015-05-07 2016-12-15 信越エンジニアリング株式会社 貼合デバイスの製造方法及び貼合デバイスの製造装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6226774B2 (ja) 2014-02-25 2017-11-08 日本碍子株式会社 複合基板の製法及び複合基板

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006509376A (ja) * 2002-12-09 2006-03-16 コミサリヤ・ア・レネルジ・アトミク 応力下の構造体の組立により複合構造体を作製する方法
JP2013058569A (ja) * 2011-09-07 2013-03-28 Tokyo Electron Ltd 接合方法、プログラム、コンピュータ記憶媒体及び接合システム
JP2014226749A (ja) * 2013-05-22 2014-12-08 株式会社ディスコ 研削方法
JP2016210075A (ja) * 2015-05-07 2016-12-15 信越エンジニアリング株式会社 貼合デバイスの製造方法及び貼合デバイスの製造装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021077712A (ja) * 2019-11-06 2021-05-20 富士電機株式会社 半導体素子の製造方法
JP7400360B2 (ja) 2019-11-06 2023-12-19 富士電機株式会社 半導体素子の製造方法
WO2023238809A1 (ja) * 2022-06-08 2023-12-14 タツモ株式会社 接合装置

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KR20190116056A (ko) 2019-10-14

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