JP2019117909A5 - - Google Patents
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- JP2019117909A5 JP2019117909A5 JP2017252357A JP2017252357A JP2019117909A5 JP 2019117909 A5 JP2019117909 A5 JP 2019117909A5 JP 2017252357 A JP2017252357 A JP 2017252357A JP 2017252357 A JP2017252357 A JP 2017252357A JP 2019117909 A5 JP2019117909 A5 JP 2019117909A5
- Authority
- JP
- Japan
- Prior art keywords
- mounting portions
- wiring
- semiconductor chip
- semiconductor device
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 5
- 238000007789 sealing Methods 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
- 230000008054 signal transmission Effects 0.000 claims 3
- 230000005540 biological transmission Effects 0.000 claims 2
- 239000000758 substrate Substances 0.000 description 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017252357A JP7015691B2 (ja) | 2017-12-27 | 2017-12-27 | 半導体装置 |
| US16/214,284 US11309224B2 (en) | 2017-12-27 | 2018-12-10 | Folded substrate for stacked integrated circuit devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017252357A JP7015691B2 (ja) | 2017-12-27 | 2017-12-27 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2019117909A JP2019117909A (ja) | 2019-07-18 |
| JP2019117909A5 true JP2019117909A5 (enExample) | 2020-09-17 |
| JP7015691B2 JP7015691B2 (ja) | 2022-02-03 |
Family
ID=66951441
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017252357A Active JP7015691B2 (ja) | 2017-12-27 | 2017-12-27 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US11309224B2 (enExample) |
| JP (1) | JP7015691B2 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11201096B2 (en) * | 2019-07-09 | 2021-12-14 | Texas Instruments Incorporated | Packaged device with die wrapped by a substrate |
| JP7539820B2 (ja) * | 2020-11-16 | 2024-08-26 | 新光電気工業株式会社 | 配線基板及び半導体装置 |
| US11710722B2 (en) * | 2021-04-16 | 2023-07-25 | Micron Technology, Inc. | Semiconductor assemblies with systems and methods for managing high die stack structures |
| CN113851451B (zh) * | 2021-11-30 | 2022-08-02 | 江苏长晶科技有限公司 | 一种基于可塑性基板的芯片3d堆叠的封装结构及其制造方法 |
| US20230176108A1 (en) * | 2021-12-06 | 2023-06-08 | Samsung Electronics Co.,Ltd. | Semiconductor package and method of testing the same |
| CN116660999A (zh) * | 2022-02-21 | 2023-08-29 | 北京字跳网络技术有限公司 | 佩戴检测方法、装置、设备、存储介质及计算机程序产品 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5128831A (en) * | 1991-10-31 | 1992-07-07 | Micron Technology, Inc. | High-density electronic package comprising stacked sub-modules which are electrically interconnected by solder-filled vias |
| JP3110922B2 (ja) * | 1993-08-12 | 2000-11-20 | 富士通株式会社 | マルチチップ・モジュール |
| US5646446A (en) * | 1995-12-22 | 1997-07-08 | Fairchild Space And Defense Corporation | Three-dimensional flexible assembly of integrated circuits |
| US6444921B1 (en) * | 2000-02-03 | 2002-09-03 | Fujitsu Limited | Reduced stress and zero stress interposers for integrated-circuit chips, multichip substrates, and the like |
| JP2002171071A (ja) | 2000-12-04 | 2002-06-14 | Ibiden Co Ltd | 多層配線基板、及びその製造方法 |
| JP2004228344A (ja) | 2003-01-23 | 2004-08-12 | Oki Electric Cable Co Ltd | 多層fpc |
| US6940158B2 (en) | 2003-05-30 | 2005-09-06 | Tessera, Inc. | Assemblies having stacked semiconductor chips and methods of making same |
| US7358444B2 (en) * | 2004-10-13 | 2008-04-15 | Intel Corporation | Folded substrate with interposer package for integrated circuit devices |
| CN101138089B (zh) | 2005-01-31 | 2011-02-09 | 斯班逊有限公司 | 层叠型半导体装置及层叠型半导体装置的制造方法 |
| DE102006053461A1 (de) | 2006-11-09 | 2008-05-15 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Mikroelektronische Baugruppe und Verfahren zum Herstellen einer mikroelektronischen Baugruppe |
| TWI365524B (en) * | 2007-10-04 | 2012-06-01 | Unimicron Technology Corp | Stackable semiconductor device and fabrication method thereof |
| US8278141B2 (en) * | 2008-06-11 | 2012-10-02 | Stats Chippac Ltd. | Integrated circuit package system with internal stacking module |
| US8241964B2 (en) | 2010-05-13 | 2012-08-14 | Stats Chippac, Ltd. | Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation |
| CN102254898A (zh) | 2011-07-01 | 2011-11-23 | 中国科学院微电子研究所 | 一种基于柔性基板封装的屏蔽结构及其制作工艺 |
| US10192810B2 (en) * | 2013-06-28 | 2019-01-29 | Intel Corporation | Underfill material flow control for reduced die-to-die spacing in semiconductor packages |
| CN104637927B (zh) * | 2013-11-12 | 2019-01-22 | 中国科学院微电子研究所 | 一种基于柔性基板的三维封装结构及工艺方法 |
-
2017
- 2017-12-27 JP JP2017252357A patent/JP7015691B2/ja active Active
-
2018
- 2018-12-10 US US16/214,284 patent/US11309224B2/en active Active
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