JP7015691B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP7015691B2
JP7015691B2 JP2017252357A JP2017252357A JP7015691B2 JP 7015691 B2 JP7015691 B2 JP 7015691B2 JP 2017252357 A JP2017252357 A JP 2017252357A JP 2017252357 A JP2017252357 A JP 2017252357A JP 7015691 B2 JP7015691 B2 JP 7015691B2
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Japan
Prior art keywords
wiring
semiconductor device
wiring board
mounting portions
mounting
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JP2017252357A
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Japanese (ja)
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JP2019117909A5 (enExample
JP2019117909A (ja
Inventor
泰愛 堀川
義博 井原
義弘 北
輝 田中
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2017252357A priority Critical patent/JP7015691B2/ja
Priority to US16/214,284 priority patent/US11309224B2/en
Publication of JP2019117909A publication Critical patent/JP2019117909A/ja
Publication of JP2019117909A5 publication Critical patent/JP2019117909A5/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6644—Packaging aspects of high-frequency amplifiers
    • H01L2223/6655—Matching arrangements, e.g. arrangement of inductive and capacitive components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06527—Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/05—Flexible printed circuits [FPCs]
    • H05K2201/055—Folded back on itself

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
JP2017252357A 2017-12-27 2017-12-27 半導体装置 Active JP7015691B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2017252357A JP7015691B2 (ja) 2017-12-27 2017-12-27 半導体装置
US16/214,284 US11309224B2 (en) 2017-12-27 2018-12-10 Folded substrate for stacked integrated circuit devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017252357A JP7015691B2 (ja) 2017-12-27 2017-12-27 半導体装置

Publications (3)

Publication Number Publication Date
JP2019117909A JP2019117909A (ja) 2019-07-18
JP2019117909A5 JP2019117909A5 (enExample) 2020-09-17
JP7015691B2 true JP7015691B2 (ja) 2022-02-03

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JP2017252357A Active JP7015691B2 (ja) 2017-12-27 2017-12-27 半導体装置

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US (1) US11309224B2 (enExample)
JP (1) JP7015691B2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11201096B2 (en) * 2019-07-09 2021-12-14 Texas Instruments Incorporated Packaged device with die wrapped by a substrate
JP7539820B2 (ja) * 2020-11-16 2024-08-26 新光電気工業株式会社 配線基板及び半導体装置
US11710722B2 (en) * 2021-04-16 2023-07-25 Micron Technology, Inc. Semiconductor assemblies with systems and methods for managing high die stack structures
CN113851451B (zh) * 2021-11-30 2022-08-02 江苏长晶科技有限公司 一种基于可塑性基板的芯片3d堆叠的封装结构及其制造方法
US20230176108A1 (en) * 2021-12-06 2023-06-08 Samsung Electronics Co.,Ltd. Semiconductor package and method of testing the same
CN116660999A (zh) * 2022-02-21 2023-08-29 北京字跳网络技术有限公司 佩戴检测方法、装置、设备、存储介质及计算机程序产品

Citations (7)

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JP2002171071A (ja) 2000-12-04 2002-06-14 Ibiden Co Ltd 多層配線基板、及びその製造方法
JP2004228344A (ja) 2003-01-23 2004-08-12 Oki Electric Cable Co Ltd 多層ｆｐｃ
US20040238931A1 (en) 2003-05-30 2004-12-02 Tessera, Inc. Assemblies having stacked semiconductor chips and methods of making same
WO2008055708A2 (de) 2006-11-09 2008-05-15 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Mikroelektronische baugruppe und verfahren zum herstellen einer mikroelektronischen baugruppe
US20080148559A1 (en) 2004-10-13 2008-06-26 Nickerson Robert M Folded substrate with interposer package for integrated circuit devices
US20120261818A1 (en) 2010-05-13 2012-10-18 Stats Chippac, Ltd. Semiconductor Device and Method of Embedding Bumps Formed on Semiconductor Die into Penetrable Adhesive Layer to Reduce Die Shifting During Encapsulation
WO2013004083A1 (zh) 2011-07-01 2013-01-10 中国科学院微电子研究所 一种基于柔性基板封装的屏蔽结构及其制作工艺

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JP3110922B2 (ja) * 1993-08-12 2000-11-20 富士通株式会社 マルチチップ・モジュール
US5646446A (en) * 1995-12-22 1997-07-08 Fairchild Space And Defense Corporation Three-dimensional flexible assembly of integrated circuits
US6444921B1 (en) * 2000-02-03 2002-09-03 Fujitsu Limited Reduced stress and zero stress interposers for integrated-circuit chips, multichip substrates, and the like
CN101138089B (zh) 2005-01-31 2011-02-09 斯班逊有限公司 层叠型半导体装置及层叠型半导体装置的制造方法
TWI365524B (en) * 2007-10-04 2012-06-01 Unimicron Technology Corp Stackable semiconductor device and fabrication method thereof
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CN104637927B (zh) * 2013-11-12 2019-01-22 中国科学院微电子研究所 一种基于柔性基板的三维封装结构及工艺方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002171071A (ja) 2000-12-04 2002-06-14 Ibiden Co Ltd 多層配線基板、及びその製造方法
JP2004228344A (ja) 2003-01-23 2004-08-12 Oki Electric Cable Co Ltd 多層ｆｐｃ
US20040238931A1 (en) 2003-05-30 2004-12-02 Tessera, Inc. Assemblies having stacked semiconductor chips and methods of making same
US20080148559A1 (en) 2004-10-13 2008-06-26 Nickerson Robert M Folded substrate with interposer package for integrated circuit devices
WO2008055708A2 (de) 2006-11-09 2008-05-15 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Mikroelektronische baugruppe und verfahren zum herstellen einer mikroelektronischen baugruppe
US20120261818A1 (en) 2010-05-13 2012-10-18 Stats Chippac, Ltd. Semiconductor Device and Method of Embedding Bumps Formed on Semiconductor Die into Penetrable Adhesive Layer to Reduce Die Shifting During Encapsulation
WO2013004083A1 (zh) 2011-07-01 2013-01-10 中国科学院微电子研究所 一种基于柔性基板封装的屏蔽结构及其制作工艺

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US11309224B2 (en) 2022-04-19
JP2019117909A (ja) 2019-07-18

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