JP2014112606A5 - - Google Patents

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Publication number
JP2014112606A5
JP2014112606A5 JP2012266524A JP2012266524A JP2014112606A5 JP 2014112606 A5 JP2014112606 A5 JP 2014112606A5 JP 2012266524 A JP2012266524 A JP 2012266524A JP 2012266524 A JP2012266524 A JP 2012266524A JP 2014112606 A5 JP2014112606 A5 JP 2014112606A5
Authority
JP
Japan
Prior art keywords
wiring board
semiconductor
semiconductor package
package according
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2012266524A
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English (en)
Japanese (ja)
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JP2014112606A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2012266524A priority Critical patent/JP2014112606A/ja
Priority claimed from JP2012266524A external-priority patent/JP2014112606A/ja
Priority to US14/087,461 priority patent/US20140151891A1/en
Publication of JP2014112606A publication Critical patent/JP2014112606A/ja
Publication of JP2014112606A5 publication Critical patent/JP2014112606A5/ja
Pending legal-status Critical Current

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JP2012266524A 2012-12-05 2012-12-05 半導体パッケージ Pending JP2014112606A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2012266524A JP2014112606A (ja) 2012-12-05 2012-12-05 半導体パッケージ
US14/087,461 US20140151891A1 (en) 2012-12-05 2013-11-22 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012266524A JP2014112606A (ja) 2012-12-05 2012-12-05 半導体パッケージ

Publications (2)

Publication Number Publication Date
JP2014112606A JP2014112606A (ja) 2014-06-19
JP2014112606A5 true JP2014112606A5 (enExample) 2015-12-10

Family

ID=50824666

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012266524A Pending JP2014112606A (ja) 2012-12-05 2012-12-05 半導体パッケージ

Country Status (2)

Country Link
US (1) US20140151891A1 (enExample)
JP (1) JP2014112606A (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9070653B2 (en) 2013-01-15 2015-06-30 Freescale Semiconductor, Inc. Microelectronic assembly having a heat spreader for a plurality of die
US10141201B2 (en) * 2014-06-13 2018-11-27 Taiwan Semiconductor Manufacturing Company Integrated circuit packages and methods of forming same
US9721881B1 (en) 2016-04-29 2017-08-01 Nxp Usa, Inc. Apparatus and methods for multi-die packaging
KR102123252B1 (ko) * 2016-08-31 2020-06-16 가부시키가이샤 무라타 세이사쿠쇼 회로모듈 및 그 제조 방법
JP7289719B2 (ja) * 2019-05-17 2023-06-12 新光電気工業株式会社 半導体装置、半導体装置アレイ
US10993325B2 (en) 2019-07-31 2021-04-27 Abb Power Electronics Inc. Interposer printed circuit boards for power modules
US11490517B2 (en) * 2019-07-31 2022-11-01 ABB Power Electronics, Inc. Interposer printed circuit boards for power modules
CN110461090B (zh) * 2019-08-05 2021-07-16 华为技术有限公司 电路组件以及电子设备
JP7700793B2 (ja) * 2020-08-06 2025-07-01 Ａｇｃ株式会社 積層体の製造方法、積層体および半導体パッケージの製造方法
US11469219B1 (en) * 2021-04-28 2022-10-11 Nanya Technology Corporation Dual die semiconductor package and manufacturing method thereof

Family Cites Families (23)

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US6750551B1 (en) * 1999-12-28 2004-06-15 Intel Corporation Direct BGA attachment without solder reflow
JP2001210954A (ja) * 2000-01-24 2001-08-03 Ibiden Co Ltd 多層基板
JP2003060153A (ja) * 2001-07-27 2003-02-28 Nokia Corp 半導体パッケージ
US7176506B2 (en) * 2001-08-28 2007-02-13 Tessera, Inc. High frequency chip packages with connecting elements
US20030042587A1 (en) * 2001-08-31 2003-03-06 Tsung-Jen Lee IC packaging and manufacturing methods
US7217994B2 (en) * 2004-12-01 2007-05-15 Kyocera Wireless Corp. Stack package for high density integrated circuits
CN101138089B (zh) * 2005-01-31 2011-02-09 斯班逊有限公司 层叠型半导体装置及层叠型半导体装置的制造方法
US7279786B2 (en) * 2005-02-04 2007-10-09 Stats Chippac Ltd. Nested integrated circuit package on package system
KR100809691B1 (ko) * 2006-07-28 2008-03-06 삼성전자주식회사 수동 소자를 구비한 반도체 패키지 및 이것으로 구성되는반도체 메모리 모듈
JP2009252893A (ja) * 2008-04-03 2009-10-29 Elpida Memory Inc 半導体装置
US8604603B2 (en) * 2009-02-20 2013-12-10 The Hong Kong University Of Science And Technology Apparatus having thermal-enhanced and cost-effective 3D IC integration structure with through silicon via interposers
US8362607B2 (en) * 2009-06-03 2013-01-29 Honeywell International Inc. Integrated circuit package including a thermally and electrically conductive package lid
US8241955B2 (en) * 2009-06-19 2012-08-14 Stats Chippac Ltd. Integrated circuit packaging system with mountable inward and outward interconnects and method of manufacture thereof
US8263434B2 (en) * 2009-07-31 2012-09-11 Stats Chippac, Ltd. Semiconductor device and method of mounting die with TSV in cavity of substrate for electrical interconnect of Fi-PoP
TWI385779B (zh) * 2009-10-28 2013-02-11 Nat Chip Implementation Ct Nat Applied Res Lab 多層系統晶片模組結構
US8334171B2 (en) * 2009-12-02 2012-12-18 Stats Chippac Ltd. Package system with a shielded inverted internal stacking module and method of manufacture thereof
US8310050B2 (en) * 2010-02-10 2012-11-13 Wei-Ming Chen Electronic device package and fabrication method thereof
US9385095B2 (en) * 2010-02-26 2016-07-05 Taiwan Semiconductor Manufacturing Company, Ltd. 3D semiconductor package interposer with die cavity
US8796842B2 (en) * 2010-08-20 2014-08-05 Ati Technologies Ulc Stacked semiconductor chip device with thermal management circuit board
JP5686653B2 (ja) * 2011-03-31 2015-03-18 京セラサーキットソリューションズ株式会社 複合配線基板の製造方法
US8587132B2 (en) * 2012-02-21 2013-11-19 Broadcom Corporation Semiconductor package including an organic substrate and interposer having through-semiconductor vias
US10008475B2 (en) * 2012-09-27 2018-06-26 Intel Corporation Stacked-die including a die in a package substrate
US9368438B2 (en) * 2012-12-28 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Package on package (PoP) bonding structures

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