JP2014112606A - 半導体パッケージ - Google Patents
半導体パッケージ Download PDFInfo
- Publication number
- JP2014112606A JP2014112606A JP2012266524A JP2012266524A JP2014112606A JP 2014112606 A JP2014112606 A JP 2014112606A JP 2012266524 A JP2012266524 A JP 2012266524A JP 2012266524 A JP2012266524 A JP 2012266524A JP 2014112606 A JP2014112606 A JP 2014112606A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- connection
- semiconductor chips
- wiring board
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0655—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92222—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92225—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0652—Bump or bump-like direct electrical connections from substrate to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012266524A JP2014112606A (ja) | 2012-12-05 | 2012-12-05 | 半導体パッケージ |
| US14/087,461 US20140151891A1 (en) | 2012-12-05 | 2013-11-22 | Semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012266524A JP2014112606A (ja) | 2012-12-05 | 2012-12-05 | 半導体パッケージ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2014112606A true JP2014112606A (ja) | 2014-06-19 |
| JP2014112606A5 JP2014112606A5 (enExample) | 2015-12-10 |
Family
ID=50824666
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012266524A Pending JP2014112606A (ja) | 2012-12-05 | 2012-12-05 | 半導体パッケージ |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20140151891A1 (enExample) |
| JP (1) | JP2014112606A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018043129A1 (ja) * | 2016-08-31 | 2018-03-08 | 株式会社村田製作所 | 回路モジュールおよびその製造方法 |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9070653B2 (en) | 2013-01-15 | 2015-06-30 | Freescale Semiconductor, Inc. | Microelectronic assembly having a heat spreader for a plurality of die |
| US10141201B2 (en) * | 2014-06-13 | 2018-11-27 | Taiwan Semiconductor Manufacturing Company | Integrated circuit packages and methods of forming same |
| US9721881B1 (en) | 2016-04-29 | 2017-08-01 | Nxp Usa, Inc. | Apparatus and methods for multi-die packaging |
| JP7289719B2 (ja) * | 2019-05-17 | 2023-06-12 | 新光電気工業株式会社 | 半導体装置、半導体装置アレイ |
| US10993325B2 (en) | 2019-07-31 | 2021-04-27 | Abb Power Electronics Inc. | Interposer printed circuit boards for power modules |
| US11490517B2 (en) * | 2019-07-31 | 2022-11-01 | ABB Power Electronics, Inc. | Interposer printed circuit boards for power modules |
| CN110461090B (zh) * | 2019-08-05 | 2021-07-16 | 华为技术有限公司 | 电路组件以及电子设备 |
| JP7700793B2 (ja) * | 2020-08-06 | 2025-07-01 | Agc株式会社 | 積層体の製造方法、積層体および半導体パッケージの製造方法 |
| US11469219B1 (en) * | 2021-04-28 | 2022-10-11 | Nanya Technology Corporation | Dual die semiconductor package and manufacturing method thereof |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001210954A (ja) * | 2000-01-24 | 2001-08-03 | Ibiden Co Ltd | 多層基板 |
| JP2003060153A (ja) * | 2001-07-27 | 2003-02-28 | Nokia Corp | 半導体パッケージ |
| US20030042587A1 (en) * | 2001-08-31 | 2003-03-06 | Tsung-Jen Lee | IC packaging and manufacturing methods |
| US20060113653A1 (en) * | 2004-12-01 | 2006-06-01 | Sherry Xiaoqi | Stack package for high density integrated circuits |
| JP2009252893A (ja) * | 2008-04-03 | 2009-10-29 | Elpida Memory Inc | 半導体装置 |
| JP2010283349A (ja) * | 2009-06-03 | 2010-12-16 | Honeywell Internatl Inc | 熱的および電気的伝導のパッケージのふたを含む集積回路パッケージ |
| US20110096506A1 (en) * | 2009-10-28 | 2011-04-28 | National Chip Implementation Center National Applied Research Laboratories | Multi-layer soc module structure |
| US20120043669A1 (en) * | 2010-08-20 | 2012-02-23 | Gamal Refai-Ahmed | Stacked semiconductor chip device with thermal management circuit board |
| JP2012212832A (ja) * | 2011-03-31 | 2012-11-01 | Kyocer Slc Technologies Corp | 複合配線基板の製造方法 |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6750551B1 (en) * | 1999-12-28 | 2004-06-15 | Intel Corporation | Direct BGA attachment without solder reflow |
| US7176506B2 (en) * | 2001-08-28 | 2007-02-13 | Tessera, Inc. | High frequency chip packages with connecting elements |
| CN101138089B (zh) * | 2005-01-31 | 2011-02-09 | 斯班逊有限公司 | 层叠型半导体装置及层叠型半导体装置的制造方法 |
| US7279786B2 (en) * | 2005-02-04 | 2007-10-09 | Stats Chippac Ltd. | Nested integrated circuit package on package system |
| KR100809691B1 (ko) * | 2006-07-28 | 2008-03-06 | 삼성전자주식회사 | 수동 소자를 구비한 반도체 패키지 및 이것으로 구성되는반도체 메모리 모듈 |
| US8604603B2 (en) * | 2009-02-20 | 2013-12-10 | The Hong Kong University Of Science And Technology | Apparatus having thermal-enhanced and cost-effective 3D IC integration structure with through silicon via interposers |
| US8241955B2 (en) * | 2009-06-19 | 2012-08-14 | Stats Chippac Ltd. | Integrated circuit packaging system with mountable inward and outward interconnects and method of manufacture thereof |
| US8263434B2 (en) * | 2009-07-31 | 2012-09-11 | Stats Chippac, Ltd. | Semiconductor device and method of mounting die with TSV in cavity of substrate for electrical interconnect of Fi-PoP |
| US8334171B2 (en) * | 2009-12-02 | 2012-12-18 | Stats Chippac Ltd. | Package system with a shielded inverted internal stacking module and method of manufacture thereof |
| US8310050B2 (en) * | 2010-02-10 | 2012-11-13 | Wei-Ming Chen | Electronic device package and fabrication method thereof |
| US9385095B2 (en) * | 2010-02-26 | 2016-07-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3D semiconductor package interposer with die cavity |
| US8587132B2 (en) * | 2012-02-21 | 2013-11-19 | Broadcom Corporation | Semiconductor package including an organic substrate and interposer having through-semiconductor vias |
| US10008475B2 (en) * | 2012-09-27 | 2018-06-26 | Intel Corporation | Stacked-die including a die in a package substrate |
| US9368438B2 (en) * | 2012-12-28 | 2016-06-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package on package (PoP) bonding structures |
-
2012
- 2012-12-05 JP JP2012266524A patent/JP2014112606A/ja active Pending
-
2013
- 2013-11-22 US US14/087,461 patent/US20140151891A1/en not_active Abandoned
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001210954A (ja) * | 2000-01-24 | 2001-08-03 | Ibiden Co Ltd | 多層基板 |
| JP2003060153A (ja) * | 2001-07-27 | 2003-02-28 | Nokia Corp | 半導体パッケージ |
| US20030042587A1 (en) * | 2001-08-31 | 2003-03-06 | Tsung-Jen Lee | IC packaging and manufacturing methods |
| US20060113653A1 (en) * | 2004-12-01 | 2006-06-01 | Sherry Xiaoqi | Stack package for high density integrated circuits |
| JP2009252893A (ja) * | 2008-04-03 | 2009-10-29 | Elpida Memory Inc | 半導体装置 |
| JP2010283349A (ja) * | 2009-06-03 | 2010-12-16 | Honeywell Internatl Inc | 熱的および電気的伝導のパッケージのふたを含む集積回路パッケージ |
| US20110096506A1 (en) * | 2009-10-28 | 2011-04-28 | National Chip Implementation Center National Applied Research Laboratories | Multi-layer soc module structure |
| US20120043669A1 (en) * | 2010-08-20 | 2012-02-23 | Gamal Refai-Ahmed | Stacked semiconductor chip device with thermal management circuit board |
| JP2012212832A (ja) * | 2011-03-31 | 2012-11-01 | Kyocer Slc Technologies Corp | 複合配線基板の製造方法 |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018043129A1 (ja) * | 2016-08-31 | 2018-03-08 | 株式会社村田製作所 | 回路モジュールおよびその製造方法 |
| KR20190032536A (ko) * | 2016-08-31 | 2019-03-27 | 가부시키가이샤 무라타 세이사쿠쇼 | 회로모듈 및 그 제조 방법 |
| JPWO2018043129A1 (ja) * | 2016-08-31 | 2019-06-24 | 株式会社村田製作所 | 回路モジュールおよびその製造方法 |
| KR102123252B1 (ko) | 2016-08-31 | 2020-06-16 | 가부시키가이샤 무라타 세이사쿠쇼 | 회로모듈 및 그 제조 방법 |
| US10930573B2 (en) | 2016-08-31 | 2021-02-23 | Murata Manufacturing Co., Ltd. | Circuit module and manufacturing method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| US20140151891A1 (en) | 2014-06-05 |
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