JP2019110160A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2019110160A JP2019110160A JP2017240816A JP2017240816A JP2019110160A JP 2019110160 A JP2019110160 A JP 2019110160A JP 2017240816 A JP2017240816 A JP 2017240816A JP 2017240816 A JP2017240816 A JP 2017240816A JP 2019110160 A JP2019110160 A JP 2019110160A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 195
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 5
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 5
- 239000012535 impurity Substances 0.000 claims description 20
- 239000010410 layer Substances 0.000 description 14
- 230000002093 peripheral effect Effects 0.000 description 11
- 239000013256 coordination polymer Substances 0.000 description 7
- 239000004020 conductor Substances 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 230000005684 electric field Effects 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
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Abstract
Description
図面は模式的または概念的なものであり、各部分の厚さと幅との関係、部分間の大きさの比率などは、必ずしも現実のものと同一とは限らない。同じ部分を表す場合であっても、図面により互いの寸法や比率が異なって表される場合もある。
本願明細書と各図において、既出の図に関して前述したものと同様の要素には同一の符号を付して詳細な説明は適宜省略する。
図2〜図4は、実施形態に係る半導体装置を模式的断面図である。
図2は、図1(b)のA1−A2線断面図である。図3は、図1(b)のB1−B2線断面図である。図4は、図1(b)のC1−C2線断面図である。図1(a)、図1(b)及び図5は、図2〜図4の矢印AAから見た平面図である。図1(a)及び図5は、一部の要素を省略した平面図である。
図6は、図1(b)のA1−A2線断面に対応する断面図である。図7は、図1(b)のB1−B2線断面図に対応する断面図である。図8は、図1(b)のC1−C2線断面に対応する断面図である。
Claims (20)
- 第1方向に沿う第1部分と、
前記第1方向に沿う第2部分であって、前記第1部分から前記第2部分への方向は前記第1方向と交差した前記第2部分と、
前記第1方向と交差する第2方向に沿う第3部分と、
前記第2方向に沿う第4部分であって、前記第3部分から前記第4部分への方向は前記第2方向と交差した前記第4部分と、
第3方向に沿う第5部分であって、前記第3方向は、前記第1方向及び前記第2方向を含む平面に沿い前記第1方向及び前記第2方向と交差する、前記第5部分と、
前記第3方向に沿う第6部分であって、前記第5部分から前記第6部分への方向は前記第3方向と交差した前記第6部分と、
を含む第1導電部であって、前記第1部分は、前記第3部分及び前記第6部分と連続し、前記第3部分は前記第1部分及び前記第5部分と連続し、前記第5部分は、前記第3部分及び前記第2部分と連続し、第4部分は、前記第2部分及び前記第6部分と連続した、前記第1導電部と、
前記第1方向に沿い前記第1導電部と電気的に接続された導電性の第1延在部であって、前記第1延在部の前記第1方向に沿う第1延在部長さは、前記第1部分の前記第1方向に沿う第1部分長さよりも長く、前記第2部分の前記第1方向に沿う第2部分長さよりも長い、前記第1延在部と、
前記第1部分と前記第2部分との間、前記第3部分と前記第4部分との間、及び、前記第5部分と前記第6部分との間に設けられた第1導電領域と、
前記第1方向に沿い前記第1導電領域と電気的に接続された導電性の第1延在領域であって、前記第1延在領域の前記第1方向に沿う第1延在領域長さは、前記第1部分長さよりも長く、前記第2部分長さよりも長く、前記第1延在領域から前記第1延在部への方向は、前記第1方向と交差した、前記第1延在領域と、
第1〜第3半導体領域を含み炭化珪素を含む半導体部であって、
前記第1半導体領域は、第1導電形であり、第1〜第5部分領域を含み、前記第1部分領域から前記第1部分に向かう方向は、前記平面と交差する第4方向に沿い、前記第2部分領域から前記第1導電領域に向かう方向は、前記第4方向に沿い、前記第3部分領域は、前記第1部分領域と前記第2部分領域との間に位置し、前記第4部分領域から前記第1延在部への方向は、前記第4方向に沿い、前記第5部分領域から前記第1延在領域に向かう方向は、前記第4方向に沿う、前記第1半導体領域と、
前記第2半導体領域は、前記第1導電形であり、第6部分領域を含み、前記第2半導体領域における前記第1導電形の第2不純物濃度は、前記第1半導体領域における前記第1導電形の第1不純物濃度よりも高い、前記第2半導体領域と、
前記第3半導体領域は、第2導電形であり、第7〜第10部分領域を含み、前記第7部分領域は、前記第4方向において前記第3部分領域と前記第6部分領域との間に位置し、前記第8部分領域は、前記第4方向において前記第2部分領域と前記第1導電領域との間に位置し、前記第9部分領域は、前記第7部分領域と前記第8部分領域との間に位置し、前記第10部分領域は、前記第4方向において前記第5部分領域と前記第1延在領域との間に位置した、前記第3半導体領域と、
前記第1導電部と前記半導体部との間、及び前記第1延在部と前記半導体部との間に設けられた絶縁部と、
を備えた半導体装置。 - 前記第1延在部は、前記第4部分及び前記第6部分と連続した、請求項1記載の半導体装置。
- 前記第2部分から前記第1延在領域への方向は、前記第1方向に沿う、請求項1または2に記載の半導体装置。
- 前記第8部分領域は、前記第1導電領域と電気的に接続され、
前記第10部分領域は、前記第1延在領域と電気的に接続された、請求項1〜3のいずれか1つに記載の半導体装置。 - 前記半導体部は、第4半導体領域をさらに含み、
前記第4半導体領域における前記第2導電形の不純物濃度は、前記第3半導体領域における前記第2導電形の不純物濃度よりも高く、
前記第4半導体領域は、第11部分領域及び第12部分領域を含み、
前記第11部分領域は、前記第4方向において前記第8部分領域と前記第1導電領域との間に位置し、
前記第12部分領域は、前記第4方向において前記第10部分領域と前記第1延在領域との間に位置した、請求項1〜4のいずれか1つに記載の半導体装置。 - 電極をさらに備え、
前記第1半導体領域の少なくとも一部は、前記第4方向において、前記第1導電部と前記電極との間、前記第1延在部と前記電極との間、前記第1導電領域と前記電極との間、及び、前記第1延在領域と前記電極との間に位置した、請求項1〜5のいずれか1つに記載の半導体装置。 - 前記第1延在部長さは、前記第1部分長さの2倍以上である、請求項1〜6のいずれか1つに記載の半導体装置。
- 前記第1部分長さは、第1直交方向に沿う前記第1部分の長さよりも長く、前記第1直交方向は、前記平面に沿い前記第1方向に対して垂直であり、
前記第2部分長さは、前記第2部分の前記第1直交方向に沿う長さよりも長く、
前記第3部分の前記第2方向に沿う第3部分長さは、前記第3部分の第2直交方向に沿う長さよりも長く、前記第2直交方向は、前記平面に沿い前記第2方向に対して垂直であり、
前記第4部分の前記第2方向に沿う第4部分長さは、前記第4部分の前記第2直交方向に沿う長さよりも長く、
前記第5部分の前記第3方向に沿う第5部分長さは、前記第5部分の第3直交方向に沿う長さよりも長く、前記第3直交方向は、前記平面に沿い前記第3方向に対して垂直であり、
前記第6部分の前記第3方向に沿う第6部分長さは、前記第6部分の前記第3直交方向に沿う長さよりも長い、請求項1〜7のいずれか1つに記載の半導体装置。 - 前記第1延在部長さは、前記第1直交方向に沿う前記第1延在部の長さよりも長い、請求項8記載の半導体装置。
- 前記第1方向に沿う前記第1導電領域の第1導電領域長さは、前記第1部分長さよりも短く、前記第2部分長さよりも短い、請求項1〜9のいずれか1つに記載の半導体装置。
- 前記第1半導体領域は、第13部分領域をさらに含み、
前記第13部分領域は、前記第1方向において、前記第1導電領域と前記第1延在部との間に位置し、
前記第3半導体領域は、第14部分領域をさらに含み、
前記第14部分領域は、前記第1方向において、前記第1導電領域と前記第13部分領域との間に位置した、請求項1〜10のいずれか1つに記載の半導体装置。 - 前記第1半導体領域は、第15部分領域及び第16部分領域をさらに含み、
前記第15部分領域から前記第2部分に向かう方向は、前記第4方向に沿い、
前記第16部分領域は、前記第1方向において、前記第15部分領域と前記第5部分領域との間に位置し、
前記第3半導体領域は、第17部分領域をさらに含み、
前記第17部分領域は、前記第1方向において、前記第16部分領域と前記第1延在領域との間に位置した、請求項1〜11のいずれか1つに記載の半導体装置。 - 前記第1導電領域及び前記第1延在領域と電気的に接続された第2導電領域をさらに備え、
前記第1導電部は、
前記第3方向に沿う第7部分であって、前記第6部分と前記第7部分との間に前記第5部分が位置した、前記第7部分と、
前記第1方向に沿う第8部分であって、前記第8部分から前記第1延在部への方向は、前記第1方向に沿う、前記第8部分と、
前記第1方向に沿う第9部分であって、前記第8部分から前記第9部分への方向は前記第1方向と交差する、前記第9部分と、
前記第3方向に沿う第10部分と、
前記第3方向に沿う第11部分であって、前記第10部分から前記第11部分への方向は前記第3方向と交差した前記第11部分と、
をさらに含み、
前記第2導電領域は、前記第5部分と前記第7部分との間、前記第8部分と前記第9部分との間、及び、前記第10部分と前記第11部分との間に位置した、請求項1〜12のいずれか1つに記載の半導体装置。 - 前記第1半導体領域は、第18部分領域及び第19部分領域をさらに含み、
前記第18部分領域から前記第8部分への方向は、前記第4方向に沿い、
前記第19部分領域は、前記第1方向において前記第8部分と前記第1導電領域との間に位置し、
前記第2半導体領域は、第20部分領域をさらに含み、
前記第3半導体領域は、第21部分領域をさらに含み、
前記第21部分領域は、前記第4方向において前記第19部分領域と前記第20部分領域との間に設けられた、請求項13に記載の半導体装置。 - 前記第1方向に沿い前記第1導電領域及び前記第1延在領域と電気的に接続された導電性の第2延在領域をさらに備え、
前記第2延在領域の前記第1方向に沿う第2延在領域長さは、前記第1部分長さよりも長く、前記第2部分長さよりも長く、
前記第1延在部の少なくとも一部は、前記第1延在領域と前記第2延在領域との間に位置した、請求項1〜14のいずれか1つに記載の半導体装置。 - 前記第1部分から前記第2延在領域への方向は、前記第1方向に沿う、請求項15記載の半導体装置。
- 前記第1導電領域及び前記第1延在領域と電気的に接続された第3導電領域をさらに備え、
前記第1導電部は、
前記第1方向に沿う第12部分であって、前記第9部分と前記第12部分との間に前記第8部分が位置した、前記第12部分と、
前記第2方向に沿う第13部分であって、前記第4部分と前記第13部分との間に前記第3部分が位置した、前記第13部分と、
前記第3方向に沿い前記第8部分及び前記第10部分と連続した第14部分と、
前記第3方向に沿い前記第3部分及び前記第12部分と連続した第15部分であって、前記第14部分から前記第15部分への方向は、前記第3方向と交差した、前記第15部分と、
をさらに含み、
前記第3導電領域は、前記第8部分と前記第12部分との間、前記第13部分と前記第3部分との間、及び、前記第14部分と前記第15部分との間に位置し、
前記第3導電領域から前記第2延在領域への方向は、前記第1方向に沿う、請求項15または16に記載の半導体装置。 - 前記半導体部は、前記第2導電形の第5半導体領域をさらに含み、
前記第5半導体領域は、第22部分領域及び第23部分領域をさらに含み、
前記絶縁部は、前記第4方向において前記第1部分領域と前記第1部分との間に位置する領域を含み、
前記第22部分領域は、前記第4方向において、前記第1部分領域と、前記第1部分領域と前記第1部分との間に位置する前記領域と、の間に位置し、
前記絶縁部は、前記第4方向において前記第4部分領域と前記第1延在部との間に位置する領域を含み、
前記第23部分領域は、前記第4方向において、前記第4部分領域と、前記第4部分領域と前記第1延在部との間に位置する前記領域と、の間に位置した、請求項1〜17のいずれか1つに記載の半導体装置。 - 前記第1方向は、前記第1半導体領域のm面またはa面に沿う、請求項1〜18のいずれか1つに記載の半導体装置。
- 前記第2方向及び前記第3方向の少なくともいずれかは、前記第1半導体領域のm面またはa面に沿う、請求項1〜19のいずれか1つに記載の半導体装置。
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