JP2018522396A5 - - Google Patents

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Publication number
JP2018522396A5
JP2018522396A5 JP2017557422A JP2017557422A JP2018522396A5 JP 2018522396 A5 JP2018522396 A5 JP 2018522396A5 JP 2017557422 A JP2017557422 A JP 2017557422A JP 2017557422 A JP2017557422 A JP 2017557422A JP 2018522396 A5 JP2018522396 A5 JP 2018522396A5
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JP
Japan
Prior art keywords
substrate
heating system
substrate handling
led array
leds
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Application number
JP2017557422A
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English (en)
Japanese (ja)
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JP2018522396A (ja
JP6783248B2 (ja
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Priority claimed from US14/707,027 external-priority patent/US10443934B2/en
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Publication of JP2018522396A publication Critical patent/JP2018522396A/ja
Publication of JP2018522396A5 publication Critical patent/JP2018522396A5/ja
Application granted granted Critical
Publication of JP6783248B2 publication Critical patent/JP6783248B2/ja
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JP2017557422A 2015-05-08 2016-04-26 基板ハンドリング及び加熱システム Active JP6783248B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/707,027 US10443934B2 (en) 2015-05-08 2015-05-08 Substrate handling and heating system
US14/707,027 2015-05-08
PCT/US2016/029326 WO2016182726A1 (en) 2015-05-08 2016-04-26 Substrate handling and heating system

Publications (3)

Publication Number Publication Date
JP2018522396A JP2018522396A (ja) 2018-08-09
JP2018522396A5 true JP2018522396A5 (enExample) 2019-05-16
JP6783248B2 JP6783248B2 (ja) 2020-11-11

Family

ID=57221957

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017557422A Active JP6783248B2 (ja) 2015-05-08 2016-04-26 基板ハンドリング及び加熱システム

Country Status (6)

Country Link
US (1) US10443934B2 (enExample)
JP (1) JP6783248B2 (enExample)
KR (1) KR102445265B1 (enExample)
CN (1) CN107636818B (enExample)
TW (1) TWI705517B (enExample)
WO (1) WO2016182726A1 (enExample)

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US10276411B2 (en) 2017-08-18 2019-04-30 Applied Materials, Inc. High pressure and high temperature anneal chamber
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WO2019147405A1 (en) * 2018-01-23 2019-08-01 Applied Materials, Inc. Methods and apparatus for wafer temperature measurement
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