JP2018518828A - 集合化された絶縁ワイヤを含むパッケージ・アセンブリ - Google Patents

集合化された絶縁ワイヤを含むパッケージ・アセンブリ Download PDF

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JP2018518828A
JP2018518828A JP2017555753A JP2017555753A JP2018518828A JP 2018518828 A JP2018518828 A JP 2018518828A JP 2017555753 A JP2017555753 A JP 2017555753A JP 2017555753 A JP2017555753 A JP 2017555753A JP 2018518828 A JP2018518828 A JP 2018518828A
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Prior art keywords
insulated wire
wire
die
insulated
pad
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JP2017555753A
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Japanese (ja)
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JP2018518828A5 (https=
Inventor
オウヤーン，ゴーン
イ，ボム−テク
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インテル コーポレイション
インテル コーポレイション
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Publication of JP2018518828A5 publication Critical patent/JP2018518828A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/015—Manufacture or treatment of bond wires
    • H10W72/01515—Forming coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/521—Structures or relative sizes of bond wires
    • H10W72/522—Multilayered bond wires, e.g. having a coating concentric around a core
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/533—Cross-sectional shape
    • H10W72/534—Cross-sectional shape being rectangular
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/553—Materials of bond wires not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/555—Materials of bond wires of outermost layers of multilayered bond wires, e.g. material of a coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/752—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
JP2017555753A 2015-06-26 2015-06-26 集合化された絶縁ワイヤを含むパッケージ・アセンブリ Pending JP2018518828A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2015/038109 WO2016209286A1 (en) 2015-06-26 2015-06-26 Package assembly with gathered insulated wires

Publications (2)

Publication Number Publication Date
JP2018518828A true JP2018518828A (ja) 2018-07-12
JP2018518828A5 JP2018518828A5 (https=) 2018-08-23

Family

ID=57585304

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017555753A Pending JP2018518828A (ja) 2015-06-26 2015-06-26 集合化された絶縁ワイヤを含むパッケージ・アセンブリ

Country Status (8)

Country Link
US (1) US9935036B2 (https=)
EP (1) EP3314651B1 (https=)
JP (1) JP2018518828A (https=)
KR (1) KR102422980B1 (https=)
CN (1) CN108064417B (https=)
SG (1) SG11201708367SA (https=)
TW (1) TWI741983B (https=)
WO (1) WO2016209286A1 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10734321B2 (en) 2017-09-28 2020-08-04 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit and method of manufacturing same
DE102018123548B4 (de) 2017-09-28 2025-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Integrierte schaltung und verfahren zur herstellung derselben
CN112313781B (zh) * 2018-06-27 2024-05-24 三菱电机株式会社 功率模块及其制造方法以及电力变换装置
JP6971952B2 (ja) 2018-11-07 2021-11-24 三菱電機株式会社 半導体装置
TWI763110B (zh) * 2020-11-04 2022-05-01 瑞昱半導體股份有限公司 球柵陣列封裝及其封裝基板
US20230402818A1 (en) * 2022-06-08 2023-12-14 Airoha Technology Corp. Semiconductor package having ground bonding wire that crosses over signal bonding wire for crosstalk reduction and associated method
CN117199988A (zh) * 2022-06-08 2023-12-08 达发科技股份有限公司 半导体封装以及制造半导体封装的方法
JP7784974B2 (ja) * 2022-09-08 2025-12-12 三菱電機株式会社 半導体装置の製造方法
US12461324B2 (en) * 2023-04-28 2025-11-04 Avago Technologies International Sales Pte. Limited Systems and methods for packaging semiconductor devices with scalable interconnects
WO2025177212A1 (en) * 2024-02-21 2025-08-28 Baker Hughes Inteq Gmbh Mechanically coupling multiple wires to improve robustness of wire bond interconnections against mechanical vibrations and shock

Citations (4)

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Publication number Priority date Publication date Assignee Title
JP2003179095A (ja) * 2001-12-10 2003-06-27 Toppan Printing Co Ltd ボンディングワイヤ及びそれを用いた半導体装置
US20060175712A1 (en) * 2005-02-10 2006-08-10 Microbonds, Inc. High performance IC package and method
JP2007501537A (ja) * 2003-06-09 2007-01-25 フリースケール セミコンダクター インコーポレイテッド ワイヤ・ボンドの位置付けを最適化した半導体パッケージ
JP2009519611A (ja) * 2005-12-12 2009-05-14 レイセオン・サルコス・エルエルシー 回路インターフェースのための電気的マイクロフィラメント

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JPS5818949A (ja) * 1981-07-28 1983-02-03 Nec Corp 半導体装置
JP2880734B2 (ja) * 1989-08-31 1999-04-12 株式会社東芝 集積回路及びその接続回路
JP4271435B2 (ja) * 2002-12-09 2009-06-03 シャープ株式会社 半導体装置
US20040119172A1 (en) * 2002-12-18 2004-06-24 Downey Susan H. Packaged IC using insulated wire
US7675168B2 (en) * 2005-02-25 2010-03-09 Agere Systems Inc. Integrated circuit with staggered differential wire bond pairs
US7538413B2 (en) 2006-12-28 2009-05-26 Micron Technology, Inc. Semiconductor components having through interconnects
US7825527B2 (en) * 2008-06-13 2010-11-02 Altera Corporation Return loss techniques in wirebond packages for high-speed data communications
US7718471B1 (en) * 2008-11-12 2010-05-18 White Electronic Designs Corporation Method and apparatus for stacked die package with insulated wire bonds
US9184151B2 (en) * 2011-03-11 2015-11-10 Cypress Semiconductor Corporation Mixed wire bonding profile and pad-layout configurations in IC packaging processes for high-speed electronic devices
US8723338B2 (en) * 2012-08-15 2014-05-13 Stats Chippac Ltd. Integrated circuit packaging system with array contacts and method of manufacture thereof
US9078352B2 (en) * 2012-10-29 2015-07-07 Avago Technologies General Ip (Singapore) Pte. Ltd. Low inductance flex bond with low thermal resistance
US9613877B2 (en) * 2013-10-10 2017-04-04 UTAC Headquarters Pte. Ltd. Semiconductor packages and methods for forming semiconductor package

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003179095A (ja) * 2001-12-10 2003-06-27 Toppan Printing Co Ltd ボンディングワイヤ及びそれを用いた半導体装置
JP2007501537A (ja) * 2003-06-09 2007-01-25 フリースケール セミコンダクター インコーポレイテッド ワイヤ・ボンドの位置付けを最適化した半導体パッケージ
US20060175712A1 (en) * 2005-02-10 2006-08-10 Microbonds, Inc. High performance IC package and method
JP2009519611A (ja) * 2005-12-12 2009-05-14 レイセオン・サルコス・エルエルシー 回路インターフェースのための電気的マイクロフィラメント

Also Published As

Publication number Publication date
CN108064417A (zh) 2018-05-22
EP3314651B1 (en) 2023-04-19
CN108064417B (zh) 2022-01-18
US9935036B2 (en) 2018-04-03
EP3314651A1 (en) 2018-05-02
US20170207146A1 (en) 2017-07-20
WO2016209286A1 (en) 2016-12-29
TW201711151A (zh) 2017-03-16
SG11201708367SA (en) 2018-01-30
KR20180021138A (ko) 2018-02-28
KR102422980B1 (ko) 2022-07-19
EP3314651A4 (en) 2018-12-12
TWI741983B (zh) 2021-10-11

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