JP2018074148A5 - - Google Patents

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Publication number
JP2018074148A5
JP2018074148A5 JP2017193915A JP2017193915A JP2018074148A5 JP 2018074148 A5 JP2018074148 A5 JP 2018074148A5 JP 2017193915 A JP2017193915 A JP 2017193915A JP 2017193915 A JP2017193915 A JP 2017193915A JP 2018074148 A5 JP2018074148 A5 JP 2018074148A5
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JP
Japan
Prior art keywords
semiconductor chips
pin
semiconductor chip
aca
flexible substrate
Prior art date
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Application number
JP2017193915A
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English (en)
Japanese (ja)
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JP2018074148A (ja
JP6931311B2 (ja
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Priority claimed from US15/332,326 external-priority patent/US10147702B2/en
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Publication of JP2018074148A publication Critical patent/JP2018074148A/ja
Publication of JP2018074148A5 publication Critical patent/JP2018074148A5/ja
Application granted granted Critical
Publication of JP6931311B2 publication Critical patent/JP6931311B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2017193915A 2016-10-24 2017-10-04 異方性導電膜またはペーストを用いて高さの異なる複数のチップを可撓性基板上に同時に接着する方法 Expired - Fee Related JP6931311B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/332,326 2016-10-24
US15/332,326 US10147702B2 (en) 2016-10-24 2016-10-24 Method for simultaneously bonding multiple chips of different heights on flexible substrates using anisotropic conductive film or paste

Publications (3)

Publication Number Publication Date
JP2018074148A JP2018074148A (ja) 2018-05-10
JP2018074148A5 true JP2018074148A5 (enExample) 2021-03-04
JP6931311B2 JP6931311B2 (ja) 2021-09-01

Family

ID=60164608

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017193915A Expired - Fee Related JP6931311B2 (ja) 2016-10-24 2017-10-04 異方性導電膜またはペーストを用いて高さの異なる複数のチップを可撓性基板上に同時に接着する方法

Country Status (3)

Country Link
US (1) US10147702B2 (enExample)
EP (2) EP3312877A3 (enExample)
JP (1) JP6931311B2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015120156B4 (de) * 2015-11-20 2019-07-04 Semikron Elektronik Gmbh & Co. Kg Vorrichtung zur materialschlüssigen Verbindung von Verbindungspartnern eines Leistungselekronik-Bauteils und Verwendung einer solchen Vorrichtung
JP2020119983A (ja) * 2019-01-23 2020-08-06 トヨタ自動車株式会社 半導体素子接合装置、及び半導体素子接合方法
KR102789194B1 (ko) * 2020-05-12 2025-03-28 삼성전자주식회사 반도체 칩 실장용 테이프 및 상기 테이프를 이용한 반도체 패키지 제조 방법
TWI786447B (zh) * 2020-10-15 2022-12-11 均華精密工業股份有限公司 生產設備及預接合裝置
TWI874823B (zh) 2021-10-14 2025-03-01 德商平克塞莫系統有限公司 多功能設備和衝壓工具

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US5861678A (en) * 1997-12-23 1999-01-19 Micron Technology, Inc. Method and system for attaching semiconductor dice to substrates
JP2000150560A (ja) * 1998-11-13 2000-05-30 Seiko Epson Corp バンプ形成方法及びバンプ形成用ボンディングツール、半導体ウエーハ、半導体チップ及び半導体装置並びにこれらの製造方法、回路基板並びに電子機器
WO2000045430A1 (en) * 1999-01-29 2000-08-03 Matsushita Electric Industrial Co., Ltd. Electronic parts mounting method and device therefor
JP2002110744A (ja) * 2000-09-26 2002-04-12 Matsushita Electric Ind Co Ltd 半導体実装装置、および半導体実装方法
JP2002198395A (ja) * 2000-12-26 2002-07-12 Seiko Epson Corp 半導体装置及びその製造方法、回路基板並びに電子機器
JP4710205B2 (ja) 2001-09-06 2011-06-29 ソニー株式会社 フリップチップ実装方法
KR100604334B1 (ko) * 2003-11-25 2006-08-08 (주)케이나인 플립칩 패키징 공정에서 접합력이 향상된 플립칩 접합 방법
US20050282355A1 (en) * 2004-06-18 2005-12-22 Edwards David N High density bonding of electrical devices
JP4925669B2 (ja) 2006-01-13 2012-05-09 ソニーケミカル＆インフォメーションデバイス株式会社 圧着装置及び実装方法
JP2007294607A (ja) * 2006-04-24 2007-11-08 Sony Chemical & Information Device Corp 押圧ヘッド及び押圧装置
KR100785493B1 (ko) * 2006-05-04 2007-12-13 한국과학기술원 접착제의 수분흡습을 방지하는 플립칩용 웨이퍼 레벨패키지 제조방법
US7884719B2 (en) * 2006-11-21 2011-02-08 Rcd Technology Inc. Radio frequency identification (RFID) tag lamination process
JP5285144B2 (ja) 2009-03-26 2013-09-11 シャープ株式会社 チップ部品実装構造、チップ部品実装方法および液晶表示装置
US8520399B2 (en) * 2010-10-29 2013-08-27 Palo Alto Research Center Incorporated Stretchable electronics modules and circuits
JP2013084790A (ja) * 2011-10-11 2013-05-09 Sharp Corp 熱圧着装置

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