JP2017528946A5 - - Google Patents

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Publication number
JP2017528946A5
JP2017528946A5 JP2017502150A JP2017502150A JP2017528946A5 JP 2017528946 A5 JP2017528946 A5 JP 2017528946A5 JP 2017502150 A JP2017502150 A JP 2017502150A JP 2017502150 A JP2017502150 A JP 2017502150A JP 2017528946 A5 JP2017528946 A5 JP 2017528946A5
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JP
Japan
Prior art keywords
control system
circuit
receiver
master
cdr
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2017502150A
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English (en)
Japanese (ja)
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JP2017528946A (ja
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Publication date
Priority claimed from US14/801,310 external-priority patent/US9792247B2/en
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Publication of JP2017528946A publication Critical patent/JP2017528946A/ja
Publication of JP2017528946A5 publication Critical patent/JP2017528946A5/ja
Pending legal-status Critical Current

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JP2017502150A 2014-07-18 2015-07-17 チップ間通信のためのシステムおよび方法 Pending JP2017528946A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201462026063P 2014-07-18 2014-07-18
US62/026,063 2014-07-18
US14/801,310 2015-07-16
US14/801,310 US9792247B2 (en) 2014-07-18 2015-07-16 Systems and methods for chip to chip communication
PCT/US2015/040887 WO2016011341A1 (en) 2014-07-18 2015-07-17 Systems and methods for chip to chip communication

Publications (2)

Publication Number Publication Date
JP2017528946A JP2017528946A (ja) 2017-09-28
JP2017528946A5 true JP2017528946A5 (enExample) 2018-08-09

Family

ID=55074702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017502150A Pending JP2017528946A (ja) 2014-07-18 2015-07-17 チップ間通信のためのシステムおよび方法

Country Status (7)

Country Link
US (1) US9792247B2 (enExample)
EP (1) EP3170090B1 (enExample)
JP (1) JP2017528946A (enExample)
KR (1) KR20170034888A (enExample)
CN (1) CN106796563B (enExample)
TW (1) TW201606511A (enExample)
WO (1) WO2016011341A1 (enExample)

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TWI581104B (zh) * 2016-05-11 2017-05-01 廣達電腦股份有限公司 主控元件以及資料傳輸方法
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JP6640696B2 (ja) * 2016-10-20 2020-02-05 キオクシア株式会社 インターフェースシステム
CN106533186A (zh) * 2016-10-26 2017-03-22 武汉船舶通信研究所 电磁探测仪器发射机
US10218391B1 (en) * 2017-08-02 2019-02-26 Qualcomm Incorporated Systems and methods providing a low-power mode for serial links
KR102450521B1 (ko) * 2018-01-09 2022-10-05 삼성전자주식회사 모바일 장치 및 그것의 인터페이싱 방법
DE102019106030A1 (de) * 2018-03-22 2019-09-26 Infineon Technologies Ag Radar-system mit mehreren radar-chips
US10382190B1 (en) * 2018-07-13 2019-08-13 Qualcomm Incorporated Optimizing clock/data recovery power while maintaining link stability in source synchronous applications
US10727838B2 (en) 2018-07-13 2020-07-28 Qualcomm Incorporated Systems and methods for power conservation in a phase locked loop (PLL)
US11824009B2 (en) 2018-12-10 2023-11-21 Preferred Networks, Inc. Semiconductor device and data transferring method for semiconductor device
US11469781B2 (en) * 2019-03-07 2022-10-11 Mediatek Inc. Method for transferring signals via transmission interface and communications apparatus utilizing the same
CN110418247B (zh) * 2019-07-26 2021-03-05 昆腾微电子股份有限公司 一种音频接收芯片和音频接收机
CN112119366A (zh) * 2019-10-30 2020-12-22 深圳市大疆创新科技有限公司 时间同步方法、装置、系统和可移动平台
US11449453B2 (en) * 2020-04-16 2022-09-20 Mediatek Inc. Multi-package system using configurable input/output interface circuits for single-ended intra-package communication and differential inter-package communication
CN116868177A (zh) * 2021-03-30 2023-10-10 华为技术有限公司 控制芯片的方法和集成电路系统
US11775004B2 (en) 2021-09-10 2023-10-03 International Business Machines Corporation Phase aligning and calibrating clocks from one phase lock loop (PLL) for a two-chip die module
CN114488772A (zh) * 2022-02-17 2022-05-13 深圳市伟安特电子有限公司 一种用于智能汽车控制总成的主从芯片
CN115640251B (zh) * 2022-09-01 2025-07-22 中国航空工业集团公司洛阳电光设备研究所 一种基于Xilinx FPGA的串行高速电路及自适应配置方法
CN115879399B (zh) * 2023-02-16 2023-05-09 深圳市奇普乐芯片技术有限公司 芯片系统的生成方法、装置、终端及存储介质
US20250348129A1 (en) * 2024-05-09 2025-11-13 Qualcomm Incorporated Enhanced deep sleep operations for multiple chip systems

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US5963609A (en) 1996-04-03 1999-10-05 United Microelectronics Corp. Apparatus and method for serial data communication between plurality of chips in a chip set
US6631144B1 (en) * 1999-12-21 2003-10-07 Intel Corporation Multi-rate transponder system and chip set
JP4484629B2 (ja) * 2004-08-24 2010-06-16 株式会社リコー クロックデータリカバリ回路及び電圧制御発振回路
US7668238B1 (en) * 2005-12-12 2010-02-23 Xilinx, Inc. Method and apparatus for a high speed decision feedback equalizer
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