JP2017524259A - 薄膜トランジスタ - Google Patents
薄膜トランジスタ Download PDFInfo
- Publication number
- JP2017524259A JP2017524259A JP2017506742A JP2017506742A JP2017524259A JP 2017524259 A JP2017524259 A JP 2017524259A JP 2017506742 A JP2017506742 A JP 2017506742A JP 2017506742 A JP2017506742 A JP 2017506742A JP 2017524259 A JP2017524259 A JP 2017524259A
- Authority
- JP
- Japan
- Prior art keywords
- channel
- film transistor
- thin film
- transistor according
- source electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010409 thin film Substances 0.000 title claims description 53
- 230000007423 decrease Effects 0.000 claims abstract description 4
- 238000013459 approach Methods 0.000 claims description 5
- 239000000758 substrate Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
該ソース電極が第1側辺を含み、該ドレイン電極が該第1側辺に対向して位置する第2側辺を含み、かつ、かつ該第1側辺と該第2側辺との間にチャネルが形成され、
該第1側辺と該第2側辺とが非直線状を呈し、該チャネルが該第1側辺と該第2側辺とに沿って延伸して形成される寸法が該チャネルのチャネル幅であって、かつ該チャネルのチャネル幅方向において、該チャネルの中間が両端に向かって漸縮し、狭くなる。
該第1部分が該第2部分に接続する接続端と、該第2部分から離れる側の自由端とを含み、かつ該第1部分が該接続端から該自由端に向う方向において該第2側辺に近づく。
第2部分が直線状を呈する。
該ソース電極が第1側辺を含み、該ドレイン電極が該第1側辺に対向して位置する第2側辺を含み、かつ、かつ該第1側辺と該第2側辺との間にチャネルが形成され、
該第1側辺と該第2側辺とが非直線状を呈し、該チャネルが該第1側辺と該第2側辺とに沿って延伸して形成される寸法が該チャネルのチャネル幅であって、かつ該チャネルのチャネル幅方向において、該チャネルの中間が両端に向かって漸縮し、狭くなり、
該第1側辺が順に接続する第1部分と第2部分と第3部分とを含み、該第1部分と該第3部分326とが該第2部分の両側に、対称に設けられ、
該第1部分が該第2部分に接続する接続端と、該第2部分から離れる側の自由端とを含み、かつ該第1部分が該接続端から該自由端に向う方向において該第2側辺に近づき、
該チャネルの中間部分において、該チャネルの長さが4.5μmであって、該チャネルの両端において、該チャネルの長が2.5μmより長く、4.5μmより短い。
該ソース電極が第1側辺を含み、該ドレイン電極が該第1側辺に対向して位置する第2側辺を含み、かつ、かつ該第1側辺と該第2側辺との間にチャネルが形成され、
該第1側辺と該第2側辺とが非直線状を呈し、該チャネルが該第1側辺と該第2側辺とに沿って延伸して形成される寸法が該チャネルのチャネル幅であって、かつ該チャネルのチャネル幅方向において、該チャネルの中間が両端に向かって漸縮し、狭くなる。係る薄膜トランジスタの特徴を説明するために、具体的な実施例を挙げ、図面を参照にして以下に詳述する。
100 薄膜トランジスタ
20 ソース電極
30 ソース電極
32 第1側辺
322 第1部分
324 第2部分
326 第3部分
40 ドレイン電極
50 ドレイン電極
52 第2側辺
60 チャネル
70 チャネル
W チャネル幅
L チャネル長
Claims (12)
- ゲート電極と、ソース電極と、ドレイン電極と、を含んでなり、かつ該ソース電極と該ドレイン電極とが該ゲート電極上に並設され、
該ソース電極が第1側辺を含み、該ドレイン電極が該第1側辺に対向して位置する第2側辺を含み、かつ、かつ該第1側辺と該第2側辺との間にチャネルが形成され、
該第1側辺と該第2側辺とが非直線状を呈し、該チャネルが該第1側辺と該第2側辺とに沿って延伸して形成される寸法が該チャネルのチャネル幅であって、かつ該チャネルのチャネル幅方向において、該チャネルの中間が両端に向かって漸縮し、狭くなることを特徴とする薄膜トランジスタ。 - 前記第1側辺が順に接続する第1部分と第2部分と第3部分とを含み、該第1部分と該第3部分326とが該第2部分の両側に、対称に設けられ、
該第1部分が該第2部分に接続する接続端と、該第2部分から離れる側の自由端とを含み、かつ該第1部分が該接続端から該自由端に向う方向において該第2側辺に近づくことを特徴とする請求項1に記載の薄膜トランジスタ。 - 前記第2側辺と該第1側辺とが同一の形状を呈することを特徴とする請求項2に記載の薄膜トランジスタ。
- 前記第2部分が直線状を呈することを特徴とする請求項3に記載の薄膜トランジスタ。
- 前記第1部分と該第3部分とがいずれも直線状を呈し、かつ該第1部分と該第2部分との間の夾角と、及び該第3部分と該第2部分との間の夾角が鈍角であることを特徴とする請求項3に記載の薄膜トランジスタ。
- 前記第1部分と該第3部分とが円弧線状を呈し、かつ該第1部分と該第2部分との間と、及び該第3部分と該第2部分との間が曲線を描いて接続することを特徴とする請求項3に記載の薄膜トランジスタ。
- 前記チャネルの中間部分において、該チャネルの長さが4.5μmであって、該チャネルの両端において、該チャネルの長が2.5μmより長く、4.5μmより短いことを特徴とする請求項1に記載の薄膜トランジスタ。
- ゲート電極と、ソース電極と、ドレイン電極と、を含んでなり、かつ該ソース電極と該ドレイン電極とが該ゲート電極上に並設され、
該ソース電極が第1側辺を含み、該ドレイン電極が該第1側辺に対向して位置する第2側辺を含み、かつ、かつ該第1側辺と該第2側辺との間にチャネルが形成され、
該第1側辺と該第2側辺とが非直線状を呈し、該チャネルが該第1側辺と該第2側辺とに沿って延伸して形成される寸法が該チャネルのチャネル幅であって、かつ該チャネルのチャネル幅方向において、該チャネルの中間が両端に向かって漸縮し、狭くなり、
該第1側辺が順に接続する第1部分と第2部分と第3部分とを含み、該第1部分と該第3部分326とが該第2部分の両側に、対称に設けられ、
該第1部分が該第2部分に接続する接続端と、該第2部分から離れる側の自由端とを含み、かつ該第1部分が該接続端から該自由端に向う方向において該第2側辺に近づき、
該チャネルの中間部分において、該チャネルの長さが4.5μmであって、該チャネルの両端において、該チャネルの長が2.5μmより長く、4.5μmより短いことを特徴とする薄膜トランジスタ。 - 前記第2側辺と該第1側辺とが同一の形状を呈することを特徴とする請求項8に記載の薄膜トランジスタ。
- 前記第2部分が直線状を呈することを特徴とする請求項9に記載の薄膜トランジスタ。
- 前記第1部分と該第3部分とがいずれも直線状を呈し、かつ該第1部分と該第2部分との間の夾角と、及び該第3部分と該第2部分との間の夾角が鈍角であることを特徴とする請求項9に記載の薄膜トランジスタ。
- 前記第1部分と該第3部分とが円弧線状を呈し、かつ該第1部分と該第2部分との間と、及び該第3部分と該第2部分との間が曲線を描いて接続することを特徴とする請求項9に記載の薄膜トランジスタ。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410558127.5A CN104409509A (zh) | 2014-10-20 | 2014-10-20 | 薄膜晶体管 |
CN201410558127.5 | 2014-10-20 | ||
PCT/CN2014/089425 WO2016061808A1 (zh) | 2014-10-20 | 2014-10-24 | 薄膜晶体管 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2017524259A true JP2017524259A (ja) | 2017-08-24 |
JP6383486B2 JP6383486B2 (ja) | 2018-08-29 |
Family
ID=52647124
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2017506742A Active JP6383486B2 (ja) | 2014-10-20 | 2014-10-24 | 薄膜トランジスタ |
Country Status (7)
Country | Link |
---|---|
US (1) | US9588392B2 (ja) |
JP (1) | JP6383486B2 (ja) |
KR (1) | KR101962554B1 (ja) |
CN (1) | CN104409509A (ja) |
GB (2) | GB2543999B (ja) |
RU (1) | RU2672979C2 (ja) |
WO (1) | WO2016061808A1 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111433917A (zh) * | 2017-12-23 | 2020-07-17 | 深圳市柔宇科技有限公司 | 薄膜晶体管、阵列基板及显示屏 |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10270699A (ja) * | 1997-03-26 | 1998-10-09 | Seiko Epson Corp | 薄膜トランジスタ及びそれを用いた液晶表示装置及びcmos回路 |
JP2005072135A (ja) * | 2003-08-21 | 2005-03-17 | Nec Lcd Technologies Ltd | 液晶表示装置及び薄膜トランジスタの製造方法 |
US20080157086A1 (en) * | 2006-12-29 | 2008-07-03 | Au Optronics Corp. | Method for manufacturing thin film transistor |
US20090152550A1 (en) * | 2007-12-18 | 2009-06-18 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing semiconductor device |
JP2009170896A (ja) * | 2007-12-18 | 2009-07-30 | Semiconductor Energy Lab Co Ltd | 半導体装置、および半導体装置の作製方法 |
US20100244034A1 (en) * | 2009-03-27 | 2010-09-30 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor |
US20110204346A1 (en) * | 2010-02-19 | 2011-08-25 | Seiko Epson Corporation | Semiconductor device, method of manufacturing semiconductor device, and electronic apparatus |
JP2013191648A (ja) * | 2012-03-13 | 2013-09-26 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
WO2013149477A1 (zh) * | 2012-04-06 | 2013-10-10 | 京东方科技集团股份有限公司 | 薄膜晶体管、制备该薄膜晶体管的掩模板、阵列基板及显示装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3322738B2 (ja) * | 1993-12-08 | 2002-09-09 | 株式会社半導体エネルギー研究所 | 半導体装置及び集積回路ならびに表示装置 |
JP2002203970A (ja) * | 2000-12-28 | 2002-07-19 | Matsushita Electric Ind Co Ltd | 薄膜トランジスタ及びそれを用いた液晶表示装置 |
JP4628040B2 (ja) * | 2004-08-20 | 2011-02-09 | 株式会社半導体エネルギー研究所 | 半導体素子を備えた表示装置の製造方法 |
US8349671B2 (en) * | 2007-09-03 | 2013-01-08 | Semiconductor Energy Laboratory Co., Ltd. | Methods for manufacturing thin film transistor and display device |
JP2009130229A (ja) * | 2007-11-27 | 2009-06-11 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
JP5542364B2 (ja) * | 2008-04-25 | 2014-07-09 | 株式会社半導体エネルギー研究所 | 薄膜トランジスタの作製方法 |
US7982247B2 (en) * | 2008-08-19 | 2011-07-19 | Freescale Semiconductor, Inc. | Transistor with gain variation compensation |
US8227278B2 (en) * | 2008-09-05 | 2012-07-24 | Semiconductor Energy Laboratory Co., Ltd. | Methods for manufacturing thin film transistor and display device |
JP4918172B1 (ja) * | 2011-09-07 | 2012-04-18 | 英郎 川野 | アクティブ・マトリクス型表示装置 |
-
2014
- 2014-10-20 CN CN201410558127.5A patent/CN104409509A/zh active Pending
- 2014-10-24 WO PCT/CN2014/089425 patent/WO2016061808A1/zh active Application Filing
- 2014-10-24 GB GB1702975.2A patent/GB2543999B/en active Active
- 2014-10-24 GB GB1904917.0A patent/GB2569718B/en active Active
- 2014-10-24 JP JP2017506742A patent/JP6383486B2/ja active Active
- 2014-10-24 KR KR1020177011412A patent/KR101962554B1/ko active IP Right Grant
- 2014-10-24 RU RU2017113550A patent/RU2672979C2/ru active
- 2014-10-24 US US14/411,065 patent/US9588392B2/en active Active
Patent Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10270699A (ja) * | 1997-03-26 | 1998-10-09 | Seiko Epson Corp | 薄膜トランジスタ及びそれを用いた液晶表示装置及びcmos回路 |
JP2005072135A (ja) * | 2003-08-21 | 2005-03-17 | Nec Lcd Technologies Ltd | 液晶表示装置及び薄膜トランジスタの製造方法 |
US20080157086A1 (en) * | 2006-12-29 | 2008-07-03 | Au Optronics Corp. | Method for manufacturing thin film transistor |
JP2008166671A (ja) * | 2006-12-29 | 2008-07-17 | Au Optronics Corp | 薄膜トランジスターの製造方法 |
US20090152550A1 (en) * | 2007-12-18 | 2009-06-18 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing semiconductor device |
JP2009170896A (ja) * | 2007-12-18 | 2009-07-30 | Semiconductor Energy Lab Co Ltd | 半導体装置、および半導体装置の作製方法 |
US20100244034A1 (en) * | 2009-03-27 | 2010-09-30 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor |
JP2010251732A (ja) * | 2009-03-27 | 2010-11-04 | Semiconductor Energy Lab Co Ltd | 薄膜トランジスタ |
US20110204346A1 (en) * | 2010-02-19 | 2011-08-25 | Seiko Epson Corporation | Semiconductor device, method of manufacturing semiconductor device, and electronic apparatus |
JP2011171534A (ja) * | 2010-02-19 | 2011-09-01 | Seiko Epson Corp | 半導体装置、半導体装置の製造方法、及び電子機器 |
JP2013191648A (ja) * | 2012-03-13 | 2013-09-26 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
WO2013149477A1 (zh) * | 2012-04-06 | 2013-10-10 | 京东方科技集团股份有限公司 | 薄膜晶体管、制备该薄膜晶体管的掩模板、阵列基板及显示装置 |
EP2677543A1 (en) * | 2012-04-06 | 2013-12-25 | Boe Technology Group Co. Ltd. | Thin film transistor, mask plate for manufacturing thereof, array substrate and display device |
JP2015514321A (ja) * | 2012-04-06 | 2015-05-18 | 京東方科技集團股▲ふん▼有限公司 | Tft、該tftを製造するマスク、アレイ基板及び表示装置 |
Also Published As
Publication number | Publication date |
---|---|
GB201904917D0 (en) | 2019-05-22 |
RU2017113550A (ru) | 2018-10-19 |
RU2672979C2 (ru) | 2018-11-21 |
KR20170063843A (ko) | 2017-06-08 |
US9588392B2 (en) | 2017-03-07 |
GB2569718B (en) | 2019-12-11 |
GB2543999A (en) | 2017-05-03 |
US20160282649A1 (en) | 2016-09-29 |
GB2543999B (en) | 2019-12-11 |
RU2017113550A3 (ja) | 2018-10-19 |
GB2569718A (en) | 2019-06-26 |
GB201702975D0 (en) | 2017-04-12 |
WO2016061808A1 (zh) | 2016-04-28 |
GB2569718A9 (en) | 2019-07-03 |
KR101962554B1 (ko) | 2019-07-17 |
CN104409509A (zh) | 2015-03-11 |
JP6383486B2 (ja) | 2018-08-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2013179290A5 (ja) | 半導体装置 | |
JP2014042013A5 (ja) | ||
JP2016028434A5 (ja) | ||
JP2011054951A5 (ja) | 半導体装置 | |
EP3214490A1 (en) | Flexible display device | |
US20150270290A1 (en) | Metal oxide tft device and method for manufacturing the same | |
JP2016028423A5 (ja) | トランジスタ | |
JP2014134567A5 (ja) | ||
JP2016006857A5 (ja) | 半導体装置および電子機器 | |
JP2017175129A5 (ja) | 半導体装置 | |
JP2014075594A5 (ja) | ||
JP2011049549A5 (ja) | 半導体装置、モジュール、及び電子機器 | |
JP2010079038A5 (ja) | ||
JP2017207647A5 (ja) | ||
JP2007208237A5 (ja) | ||
JP2012088427A5 (ja) | ||
JP6383486B2 (ja) | 薄膜トランジスタ | |
JP2009053478A5 (ja) | ||
US9397218B2 (en) | Method and apparatus for mitigating effects of parasitic capacitance in semiconductor devices | |
US10082713B2 (en) | Thin film transistor and liquid crystal display device | |
JP2011158556A5 (ja) | ||
JP2016027663A5 (ja) | ||
JP2019169572A5 (ja) | ||
US10331000B2 (en) | Liquid crystal display and method of manufacturing thereof | |
JP2015114509A5 (ja) |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20170206 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20171221 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20180109 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180319 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20180601 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180717 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20180727 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20180803 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6383486 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |