JP2017022357A - 回路基板およびその製造方法 - Google Patents
回路基板およびその製造方法 Download PDFInfo
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- JP2017022357A JP2017022357A JP2016029175A JP2016029175A JP2017022357A JP 2017022357 A JP2017022357 A JP 2017022357A JP 2016029175 A JP2016029175 A JP 2016029175A JP 2016029175 A JP2016029175 A JP 2016029175A JP 2017022357 A JP2017022357 A JP 2017022357A
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- Prior art keywords
- layer
- phosphorus
- palladium
- circuit board
- solder mask
- Prior art date
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims abstract description 298
- 229910052763 palladium Inorganic materials 0.000 claims abstract description 149
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 98
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 98
- 239000011574 phosphorus Substances 0.000 claims abstract description 98
- 238000007772 electroless plating Methods 0.000 claims abstract description 65
- 229910000679 solder Inorganic materials 0.000 claims abstract description 62
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 57
- 229910052802 copper Inorganic materials 0.000 claims abstract description 57
- 239000010949 copper Substances 0.000 claims abstract description 57
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 49
- 229910052737 gold Inorganic materials 0.000 claims abstract description 49
- 239000010931 gold Substances 0.000 claims abstract description 49
- 239000000758 substrate Substances 0.000 claims abstract description 48
- 238000007654 immersion Methods 0.000 claims abstract description 35
- 238000007747 plating Methods 0.000 claims abstract description 25
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 58
- 229910052759 nickel Inorganic materials 0.000 claims description 29
- 238000000034 method Methods 0.000 claims description 14
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims description 8
- 230000009916 joint effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 228
- 229910000765 intermetallic Inorganic materials 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 239000002335 surface treatment layer Substances 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0338—Layered conductor, e.g. layered metal substrate, layered finish layer, layered thin film adhesion layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0344—Electroless sublayer, e.g. Ni, Co, Cd or Ag; Transferred electroless sublayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/099—Coating over pads, e.g. solder resist partly over pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/072—Electroless plating, e.g. finish plating or initial plating
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
20、30 チップ
40 ワイヤ
100a、100b、100c、100d 回路基板
110 パターン化銅層
120 リン含有無電解めっきパラジウム層
130 無電解めっきパラジウム層
140 浸漬めっき金層
150 リン含有無電解めっきニッケル層150
160a、160b ソルダマスク層
O1、O2 開口
P1、P2 パッド
Claims (10)
- 基板と、
前記基板の上に配置され、前記基板の一部を露出するパターン化銅層と、
前記パターン化銅層の上に配置され、リンの重量%が4%〜6%の範囲であり、パラジウムの重量%が94%〜96%の範囲であるリン含有無電解めっきパラジウム層と、
前記リン含有無電解めっきパラジウム層の上に配置され、パラジウムの重量%が少なくとも99%以上である無電解めっきパラジウム層と、
前記無電解めっきパラジウム層の上に配置された浸漬めっき金層と、
を含む回路基板。 - 前記リン含有無電解めっきパラジウム層と前記パターン化銅層の間に配置され、リンの重量%が6%〜12%の範囲であるリン含有無電解めっきニッケル層を含む請求項1に記載の回路基板。
- 前記基板の上に配置され、少なくとも前記基板を覆うソルダマスク層をさらに含み、前記ソルダマスク層が、複数の開口を有し、前記開口が、前記パターン化銅層の一部を露出して、複数のパッドを定義し、前記パッドの上に、前記リン含有無電解めっきパラジウム層、前記無電解めっきパラジウム層、および前記浸漬めっき金層が順番に積み重ねられた請求項1に記載の回路基板。
- 前記ソルダマスク層の前記開口が、ソルダ・マスク・ディファインド(solder mask defined, SMD)開口であり、前記開口により露出した前記パッドが、ソルダ・マスク・ディファインド(solder mask defined, SMD)パッドである請求項3に記載の回路基板。
- 前記ソルダマスク層の前記開口が、ノン・ソルダ・マスク・ディファインド(non-solder mask defined, NSMD)開口であり、前記開口により露出した前記パッドが、ノン・ソルダ・マスク・ディファインド(non-solder mask defined, NSMD)パッドである請求項3に記載の回路基板。
- 基板を提供するステップと、
前記基板の上に、前記基板を覆い、前記基板の一部を露出するパターン化銅層を形成するステップと、
前記パターン化銅層の上に、前記パターン化銅層を覆い、リンの重量%が4%〜6%の範囲であり、パラジウムの重量%が94%〜96%の範囲であるリン含有無電解めっきパラジウム層を形成するステップと、
前記リン含有無電解めっきパラジウム層の上に、前記リン含有無電解めっきパラジウム層を覆い、パラジウムの重量%が少なくとも99%以上である無電解めっきパラジウム層を形成するステップと、
前記無電解めっきパラジウム層の上に、前記無電解めっきパラジウム層を覆う浸漬めっき金層を形成するステップと、
を含む回路基板の製造方法。 - 前記リン含有無電解めっきパラジウム層を形成する前に、前記パターン化銅層の上に、前記リン含有無電解めっきパラジウム層と前記パターン化銅層の間に配置され、リンの重量%が6%〜12%の範囲であるリン含有無電解めっきニッケル層を形成するステップをさらに含む請求項6に記載の回路基板の製造方法。
- 前記パターン化銅層を形成した後に、前記基板の上に、少なくとも前記基板を覆い、複数の開口を有するソルダマスク層を形成するステップをさらに含み、前記開口が、前記パターン化銅層の一部を露出して、複数のパッドを定義する請求項6に記載の回路基板の製造方法。
- 前記ソルダマスク層の前記開口が、ソルダ・マスク・ディファインド(solder mask defined, SMD)開口であり、前記開口により露出した前記パッドが、ソルダ・マスク・ディファインド(solder mask defined, SMD)パッドである請求項8に記載の回路基板の製造方法。
- 前記ソルダマスク層の前記開口が、ノン・ソルダ・マスク・ディファインド(non-solder mask defined, NSMD)開口であり、前記開口により露出した前記パッドが、ノン・ソルダ・マスク・ディファインド(non-solder mask defined, NSMD)パッドである請求項8に記載の回路基板の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW104122245A TWI542729B (zh) | 2015-07-09 | 2015-07-09 | 線路板及其製作方法 |
TW104122245 | 2015-07-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2017022357A true JP2017022357A (ja) | 2017-01-26 |
Family
ID=56997169
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2016029175A Pending JP2017022357A (ja) | 2015-07-09 | 2016-02-18 | 回路基板およびその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9591753B2 (ja) |
JP (1) | JP2017022357A (ja) |
CN (1) | CN106341943B (ja) |
TW (1) | TWI542729B (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109156080B (zh) * | 2016-05-16 | 2021-10-08 | 株式会社村田制作所 | 陶瓷电子部件 |
US11842958B2 (en) * | 2022-03-18 | 2023-12-12 | Chun-Ming Lin | Conductive structure including copper-phosphorous alloy and a method of manufacturing conductive structure |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2003023132A (ja) * | 2001-07-10 | 2003-01-24 | Sony Corp | リードフレームおよび電子回路装置、並びにその製造方法 |
JP2008177261A (ja) * | 2007-01-17 | 2008-07-31 | Okuno Chem Ind Co Ltd | 多層めっき皮膜及びプリント配線板 |
JP2008291348A (ja) * | 2007-04-27 | 2008-12-04 | Hitachi Chem Co Ltd | 接続端子、接続端子を用いた半導体パッケージ及び半導体パッケージの製造方法 |
JP2013138182A (ja) * | 2011-11-30 | 2013-07-11 | Tdk Corp | 端子構造、プリント配線板、モジュール基板、電子デバイス及び端子構造の製造方法 |
JP2014062315A (ja) * | 2012-09-21 | 2014-04-10 | Samsung Electro-Mechanics Co Ltd | 電極パッド、これを用いた印刷回路基板及びその製造方法 |
Family Cites Families (12)
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CN1060806A (zh) * | 1991-10-03 | 1992-05-06 | 机械电子工业部郑州机械研究所 | 异种钢成分梯度过渡的焊接法 |
US6585904B2 (en) * | 2001-02-15 | 2003-07-01 | Peter Kukanskis | Method for the manufacture of printed circuit boards with plated resistors |
US7391116B2 (en) * | 2003-10-14 | 2008-06-24 | Gbc Metals, Llc | Fretting and whisker resistant coating system and method |
KR100688833B1 (ko) * | 2005-10-25 | 2007-03-02 | 삼성전기주식회사 | 인쇄회로기판의 도금층 형성방법 및 이로부터 제조된인쇄회로기판 |
EP2469992B1 (en) * | 2010-12-23 | 2015-02-11 | Atotech Deutschland GmbH | Method for obtaining a palladium surface finish for copper wire bonding on printed circuit boards and IC-substrates |
TW201233280A (en) | 2011-01-25 | 2012-08-01 | Taiwan Uyemura Co Ltd | Chemical palladium-gold plating film method |
CN102407408A (zh) * | 2011-09-23 | 2012-04-11 | 南京工业大学 | 一种适用于异种金属材料焊接的焊接结及其制备方法 |
EP2628824B1 (en) * | 2012-02-16 | 2014-09-17 | Atotech Deutschland GmbH | Method for electroless nickel-phosphorous alloy deposition onto flexible substrates |
US20150237736A1 (en) * | 2012-08-27 | 2015-08-20 | Zeon Corporation | Method of production of circuit board |
EP2803756A1 (en) * | 2013-05-13 | 2014-11-19 | Atotech Deutschland GmbH | Method for depositing thick copper layers onto sintered materials |
CN103480846B (zh) * | 2013-09-30 | 2015-06-24 | 南京理工大学 | 一种钛-钢异种金属烧结/焊接的连接方法 |
TWI482541B (zh) | 2013-12-10 | 2015-04-21 | Subtron Technology Co Ltd | 線路板及其製作方法 |
-
2015
- 2015-07-09 TW TW104122245A patent/TWI542729B/zh not_active IP Right Cessation
- 2015-09-07 CN CN201510562497.0A patent/CN106341943B/zh not_active Expired - Fee Related
- 2015-09-10 US US14/849,614 patent/US9591753B2/en active Active
-
2016
- 2016-02-18 JP JP2016029175A patent/JP2017022357A/ja active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2003023132A (ja) * | 2001-07-10 | 2003-01-24 | Sony Corp | リードフレームおよび電子回路装置、並びにその製造方法 |
JP2008177261A (ja) * | 2007-01-17 | 2008-07-31 | Okuno Chem Ind Co Ltd | 多層めっき皮膜及びプリント配線板 |
JP2008291348A (ja) * | 2007-04-27 | 2008-12-04 | Hitachi Chem Co Ltd | 接続端子、接続端子を用いた半導体パッケージ及び半導体パッケージの製造方法 |
JP2013138182A (ja) * | 2011-11-30 | 2013-07-11 | Tdk Corp | 端子構造、プリント配線板、モジュール基板、電子デバイス及び端子構造の製造方法 |
JP2014062315A (ja) * | 2012-09-21 | 2014-04-10 | Samsung Electro-Mechanics Co Ltd | 電極パッド、これを用いた印刷回路基板及びその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US9591753B2 (en) | 2017-03-07 |
TW201702429A (zh) | 2017-01-16 |
TWI542729B (zh) | 2016-07-21 |
CN106341943B (zh) | 2019-05-24 |
CN106341943A (zh) | 2017-01-18 |
US20170013710A1 (en) | 2017-01-12 |
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