JP2015519782A5 - - Google Patents

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JP2015519782A5
JP2015519782A5 JP2015504722A JP2015504722A JP2015519782A5 JP 2015519782 A5 JP2015519782 A5 JP 2015519782A5 JP 2015504722 A JP2015504722 A JP 2015504722A JP 2015504722 A JP2015504722 A JP 2015504722A JP 2015519782 A5 JP2015519782 A5 JP 2015519782A5
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assembly
microstrip line
dielectric
ground plane
dielectric constant
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JP2015504722A
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JP6155324B2 (ja
JP2015519782A (ja
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Priority claimed from US13/439,557 external-priority patent/US9405064B2/en
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Claims (12)

  1. 第1の幅を有する第1の部分と前記第1の幅よりも大きい第2の幅を有する第2の部分とを有する導電性材料のマイクロストリップラインと、
    前記マイクロストリップラインの前記第1の部分に電気的に結合される集積回路と、
    前記集積回路の下方の導電性材料の第1の接地平面であって、前記マイクロストリップラインの下方に第1の距離で、前記集積回路の下方から延びて前記マイクロストリップラインの第1の部分の下方にあり、前記マイクロストリップラインの第2の部分の下方にない、前記第1の接地平面と、
    前記第1の接地平面に電気的に結合される第2の接地平面であって、前記マイクロストリップラインの下方に前記第1の距離よりも大きい第2の距離で、前記マイクロストリップラインの第2の部分の下方に、そして前記第2の部分を越えて延びる、前記第2の接地平面と、
    頂部表面を有するベース基板と、
    誘電性コアと前記誘電性コアの周りの誘電性クラッディングとを有する誘電性導波管であって、前記誘電性コアが、前記基板の頂部表面上に形成される1つの表面を有し、前記誘電性コアの第1の端部が、前記第2の接地平面の上方で前記マイクロストリップラインの第2の部分に結合される、前記誘電性導波管と、
    を含む、アセンブリ。
  2. 請求項1に記載のアセンブリであって、
    前記集積回路と前記マイクロストリップラインとを支えるパッケージ基板を更に含む、アセンブリ。
  3. 請求項1に記載のアセンブリであって、
    前記第1の接地平面を前記第2の接地平面に結合するはんだボールを更に含む、アセンブリ。
  4. 請求項1に記載のアセンブリであって、
    前記誘電性コアが第1の誘電率を有し、前記ベース基板が前記第1の誘電率よりも低い第2の誘電率を有し、前記誘電性クラッディングが前記第1の誘電率よりも低い第3の誘電率を有する、アセンブリ。
  5. 請求項1に記載のアセンブリであって、
    前記誘電性コアが第1の誘電率を有し、前記ベース基板が前記第1の誘電率よりも低い第2の誘電率を有し、前記誘電性クラッディングが前記第2の誘電率と等しい第3の誘電率を有する、アセンブリ。
  6. 請求項1に記載のアセンブリであって、
    前記マイクロストリップラインが、前記第1の部分と前記第2の部分とを繋ぐ第3の部分を含み、前記第3の部分が、前記第1の部分から前記第2の部分に向けて幅広となる、アセンブリ。
  7. 請求項1に記載のアセンブリであって、
    前記マイクロストリップラインが、前記第1の部分と前記第2の部分とを繋ぐ第3の部分を含み、前記第3の部分が、前記第1の部分から前記第2の部分に向けて幅広となって丸くなる、アセンブリ。
  8. 請求項1に記載のアセンブリであって、
    前記誘電性コアが、断面において概して長方形であり、前記ベース基板に取り付けられる1つの平面の側と他の3つの側上のクラッディングとを有する、アセンブリ。
  9. 請求項1に記載のアセンブリであって、
    前記第1及び第2の距離が、前記マイクロストリップラインの第1及び第2の部分のそれぞれに対して約50オームのマッチングインピーダンスを示す、アセンブリ。
  10. 請求項1に記載のアセンブリであって、
    前記ベース基板が印刷回路板である、アセンブリ。
  11. 請求項1に記載のアセンブリであって、
    前記第2の接地平面が前記集積回路と前記第1の接地平面と前記誘電性導波管との下方に延びる、アセンブリ。
  12. 請求項1に記載のアセンブリであって、
    別のマイクロストリップラインと前記別のマイクロストリップラインに結合される別の集積回路とを更に含み、
    前記誘電性導波管が、前記別のマイクロストリップラインに結合される他の端部を有する、アセンブリ。
JP2015504722A 2012-04-04 2013-04-04 誘電性導波路を用いたチップ間通信 Active JP6155324B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/439,557 2012-04-04
US13/439,557 US9405064B2 (en) 2012-04-04 2012-04-04 Microstrip line of different widths, ground planes of different distances
PCT/US2013/035273 WO2013152191A1 (en) 2012-04-04 2013-04-04 Interchip communication using a dielectric waveguide

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JP2017110767A Division JP6427626B2 (ja) 2012-04-04 2017-06-05 誘電性導波路を用いたチップ間通信

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JP2015519782A JP2015519782A (ja) 2015-07-09
JP2015519782A5 true JP2015519782A5 (ja) 2016-05-26
JP6155324B2 JP6155324B2 (ja) 2017-06-28

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JP (2) JP6155324B2 (ja)
CN (1) CN104220909B9 (ja)
WO (1) WO2013152191A1 (ja)

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