JP2015204460A - Ｔｅｇ−ｆｅｔ、及びそのｔｅｇテスト方法 - Google Patents

Ｔｅｇ−ｆｅｔ、及びそのｔｅｇテスト方法 Download PDF

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Publication number
JP2015204460A
JP2015204460A JP2015080092A JP2015080092A JP2015204460A JP 2015204460 A JP2015204460 A JP 2015204460A JP 2015080092 A JP2015080092 A JP 2015080092A JP 2015080092 A JP2015080092 A JP 2015080092A JP 2015204460 A JP2015204460 A JP 2015204460A
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JP
Japan
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teg
fet
gate region
gate
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Pending
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JP2015080092A
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English (en)
Japanese (ja)
Inventor
進 ▲ロン▼ 厳
Chin Rung Yan
進 ▲ロン▼ 厳
魯 男 孫
Lunan Sun
魯 男 孫
嘉 哲 許
Chia-Che Hsu
嘉 哲 許
家 ▲チ▼ 黄
Chia-Chi Huang
家 ▲チ▼ 黄
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EverDisplay Optronics Shanghai Co Ltd
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EverDisplay Optronics Shanghai Co Ltd
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Application filed by EverDisplay Optronics Shanghai Co Ltd filed Critical EverDisplay Optronics Shanghai Co Ltd
Publication of JP2015204460A publication Critical patent/JP2015204460A/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2601—Apparatus or methods therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2642—Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2015080092A 2014-04-10 2015-04-09 Ｔｅｇ−ｆｅｔ、及びそのｔｅｇテスト方法 Pending JP2015204460A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410143407.XA CN103928523B (zh) 2014-04-10 2014-04-10 一种测试器件群场效应晶体管及其测试器件群测试方法
CN201410143407.X 2014-04-10

Publications (1)

Publication Number Publication Date
JP2015204460A true JP2015204460A (ja) 2015-11-16

Family

ID=51146683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015080092A Pending JP2015204460A (ja) 2014-04-10 2015-04-09 Ｔｅｇ−ｆｅｔ、及びそのｔｅｇテスト方法

Country Status (4)

Country Link
JP (1) JP2015204460A (zh)
KR (1) KR20150117615A (zh)
CN (1) CN103928523B (zh)
TW (1) TWI552246B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105810137B (zh) * 2016-05-31 2019-01-04 京东方科技集团股份有限公司 阵列基板及其检测方法
CN106653641B (zh) * 2017-01-10 2019-05-10 京东方科技集团股份有限公司 一种tft制程工艺的电学性能测试方法
CN108470728B (zh) * 2018-03-13 2020-03-31 西安交通大学 同时兼容电学测试和光学互联的焊盘结构及其测试方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000150680A (ja) * 1998-11-12 2000-05-30 Fujitsu Ltd 半導体記憶装置
CN102176442B (zh) * 2011-02-22 2012-12-05 北京大学 用于测量mos器件hci可靠性的测试结构及方法
TWI520244B (zh) * 2011-09-20 2016-02-01 聯華電子股份有限公司 測試鍵的電路架構與測試鍵的測試方法
CN102393501B (zh) * 2011-10-14 2013-11-13 哈尔滨工业大学 一种mosfet可靠性测试分析系统的mosfet静态参数测试方法

Also Published As

Publication number Publication date
CN103928523A (zh) 2014-07-16
TW201539603A (zh) 2015-10-16
TWI552246B (zh) 2016-10-01
CN103928523B (zh) 2016-08-24
KR20150117615A (ko) 2015-10-20

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