JP2015095482A - 半導体部品上へのマイクロバンプの作製方法 - Google Patents
半導体部品上へのマイクロバンプの作製方法 Download PDFInfo
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Abstract
Description
コンタクト領域を含む上部メタライゼーション層を有する半導体部品を提供する工程と、
メタライゼーションの上にパッシベーションを堆積する工程と、
パッシベーションの中に複数の開口部を作製し、これにより開口部の底にコンタクト領域を露出させる工程と、を含む。開口部は、このように、本質的にパッシベーション層を通る垂直の開口部であり、「垂直」は、上部表面から底部表面までの開口部で、中心軸の周囲に、好適には対称軸の周囲に配置されるとの意味で、コンタクト領域の上にマイクロバンプを作製し、マイクロバンプは複数の開口部を通ってコンタクト領域と電気的に接触する。
図5は、活性マイクロバンプ28の上面と、様々な領域の可能な大きさを示す。それらの大きさは、例示としてのみ示される。開口部は、パッシベーション層の平面において、正八角形の形状を有する。パッシベーション層15の中の開口部16の示された大きさ(2μmより僅かに大きい最大直径)と数、およびアレイの同じ列の隣り合う開口部の間の距離(2μm)は、開口部の上に等角に堆積した金属コンタクトパッド19の上に堆積した、直径が25μmのマイクロバンプが、認識できる上部形状を示さないことを確実にできる。この図で見られる他の特徴は、金属コンタクトパッド19の周囲と第2のパッシベーション層20の中に作製された円形のコンタクト開口部32である。
Claims (17)
- ピラー型マイクロバンプを半導体部品上に形成する方法であって、
半導体部品を提供する工程であって、半導体部品は上部メタライゼーション層を有し、メタライゼーション層はコンタクト領域を含む工程と、
メタライゼーション層の上にパッシベーション層を堆積する工程と、
パッシベーション層の中に複数の開口部を形成し、それにより開口部の底にコンタクト領域を露出させる工程と、
コンタクト領域の上にマイクロバンプを形成する工程であって、マイクロバンプは複数の開口部を介してコンタクト領域に電気的に接続する工程と、を含む方法。 - 開口部の数と大きさ、および開口部の間の距離は、開口部によって規定される形状がマイクロバンプの上面に実質的に転写されないように選択される請求項1に記載の方法。
- パッシベーション層と開口部の上に、金属コンタクト層が等方的に堆積され、
金属コンタクト層がパターニングされて、コンタクト領域を覆い、コンタクト領域と電気的に接続する金属コンタクトパッドが形成され、
金属コンタクトパッドの上にマイクロバンプが形成される請求項1または2に記載の方法。 - マイクロバンプの形成前に、金属コンタクトパッドの全体の上に第2のパッシベーション層が堆積され、
コンタクトパッドの端部を覆う一方、少なくとも開口部の一部を露出させるように、第2のパッシベーション層がパターニングされる請求項3に記載の方法。 - 開口部は傾斜したサイドウォールを有する請求項1に記載の方法。
- パッシベーション層の平面に対するサイドウォールの角度は、50°から85°である請求項5に記載の方法。
- 開口部は、規則的なパターンに配置される請求項1に記載の方法。
- 2つの隣り合う開口部の間の距離と同様に、開口部の最大直径は、0.5μmから4μmである請求項1に記載の方法。
- 上部メタライゼーション層は、バックエンドオブライン(BEOL)メタライゼーション層の積層の、最後の層である請求項1に記載の方法。
- パッシベーション層の中の開口部の体積と、マイクロバンプの体積との間の比は、0.1%から5%である請求項1に記載の方法。
- 第1と第2の部品を含み、ピラー型マイクロバンプが2つの部品の間の電気的接続を形成する半導体パッケージであって、
マイクロバンプの少なくとも1つは、パッシベーション層の中の複数のコンタクト開口部を介して部品の1つに接触する半導体パッケージ。 - 開口部は傾斜したサイドウォールを有する請求項11に記載の半導体パッケージ。
- パッシベーション層の平面に対するサイドウォールの角度は、50°から85°である請求項12に記載の半導体パッケージ。
- 開口部は、規則的なパターンに配置される請求項11に記載の方法。
- 2つの隣り合う開口部の間の距離と同様に、開口部の最大直径は、0.5μmから4μmである請求項11に記載の半導体パッケージ。
- コンタクトパッドは、コンタクトパッドの上に堆積されたマイクロバンプと共に、複数の開口部を覆う請求項11に記載の半導体パッケージ。
- 部品の1つは、集積回路チップである請求項11に記載の半導体パッケージ。
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