JP2015026341A5 - - Google Patents
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- Publication number
- JP2015026341A5 JP2015026341A5 JP2013157090A JP2013157090A JP2015026341A5 JP 2015026341 A5 JP2015026341 A5 JP 2015026341A5 JP 2013157090 A JP2013157090 A JP 2013157090A JP 2013157090 A JP2013157090 A JP 2013157090A JP 2015026341 A5 JP2015026341 A5 JP 2015026341A5
- Authority
- JP
- Japan
- Prior art keywords
- bit
- logical operation
- output
- memory device
- operation result
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000000872 buffer Substances 0.000 description 12
- 230000000630 rising effect Effects 0.000 description 5
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Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013157090A JP6219631B2 (ja) | 2013-07-29 | 2013-07-29 | 論理演算装置 |
| TW103119252A TWI562059B (en) | 2013-07-29 | 2014-06-03 | Arithmetic logic unit |
| EP14831256.4A EP3029839B1 (en) | 2013-07-29 | 2014-06-09 | Arithmetic logic device |
| US14/908,339 US9866219B2 (en) | 2013-07-29 | 2014-06-09 | Device for logic operation |
| PCT/JP2014/065245 WO2015015905A1 (ja) | 2013-07-29 | 2014-06-09 | 論理演算装置 |
| CN201480042802.7A CN105432018B (zh) | 2013-07-29 | 2014-06-09 | 逻辑运算装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013157090A JP6219631B2 (ja) | 2013-07-29 | 2013-07-29 | 論理演算装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2015026341A JP2015026341A (ja) | 2015-02-05 |
| JP2015026341A5 true JP2015026341A5 (enExample) | 2016-09-01 |
| JP6219631B2 JP6219631B2 (ja) | 2017-10-25 |
Family
ID=52431449
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013157090A Active JP6219631B2 (ja) | 2013-07-29 | 2013-07-29 | 論理演算装置 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9866219B2 (enExample) |
| EP (1) | EP3029839B1 (enExample) |
| JP (1) | JP6219631B2 (enExample) |
| CN (1) | CN105432018B (enExample) |
| TW (1) | TWI562059B (enExample) |
| WO (1) | WO2015015905A1 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10990389B2 (en) * | 2019-04-29 | 2021-04-27 | Micron Technology, Inc. | Bit string operations using a computing tile |
| US10778245B1 (en) * | 2019-08-20 | 2020-09-15 | Micron Technology, Inc. | Bit string conversion |
| US11227641B1 (en) * | 2020-07-21 | 2022-01-18 | Micron Technology, Inc. | Arithmetic operations in memory |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2853154B2 (ja) * | 1988-08-19 | 1999-02-03 | 富士ゼロックス株式会社 | プログラマブル・ファジィ論理回路 |
| JPH0457112A (ja) * | 1990-06-26 | 1992-02-24 | Mitsubishi Electric Corp | 演算装置 |
| US6049223A (en) * | 1995-03-22 | 2000-04-11 | Altera Corporation | Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory |
| US6487190B1 (en) * | 1996-06-27 | 2002-11-26 | Interdigital Technology Corporation | Efficient multichannel filtering for CDMA modems |
| JP3533825B2 (ja) * | 1996-04-26 | 2004-05-31 | 日本電信電話株式会社 | 論理演算ユニットおよび論理演算装置 |
| GB9900432D0 (en) * | 1999-01-08 | 1999-02-24 | Xilinx Inc | Linear feedback shift register in a progammable gate array |
| US6555398B1 (en) * | 1999-10-22 | 2003-04-29 | Magic Corporation | Software programmable multiple function integrated circuit module |
| US6463003B2 (en) * | 2000-06-07 | 2002-10-08 | Advanced Micro Devices, Inc. | Power saving scheme for burst mode implementation during reading of data from a memory device |
| US7111224B1 (en) | 2001-02-28 | 2006-09-19 | Xilinx, Inc. | FPGA configuration memory with built-in error correction mechanism |
| US20030068038A1 (en) | 2001-09-28 | 2003-04-10 | Bedros Hanounik | Method and apparatus for encrypting data |
| JP2003281516A (ja) * | 2002-03-22 | 2003-10-03 | Canon Inc | 画像処理装置及びその方法 |
| US7157933B1 (en) * | 2004-02-14 | 2007-01-02 | Herman Schmit | Configurable circuits, IC's, and systems |
| US7330050B2 (en) * | 2004-11-08 | 2008-02-12 | Tabula, Inc. | Storage elements for a configurable IC and method and apparatus for accessing data stored in the storage elements |
| US7129864B2 (en) * | 2004-12-31 | 2006-10-31 | Intel Corporation | Fast compact decoder for huffman codes |
| JP2008527878A (ja) * | 2005-01-14 | 2008-07-24 | エヌエックスピー ビー ヴィ | チャネル符号化 |
| JP4827695B2 (ja) * | 2006-11-13 | 2011-11-30 | パナソニック株式会社 | 無線受信装置 |
| US7768430B1 (en) * | 2008-05-20 | 2010-08-03 | Altera Corporation | Look-up table based memory |
| US7663957B2 (en) * | 2008-05-27 | 2010-02-16 | Via Technologies, Inc. | Microprocessor with program-accessible re-writable non-volatile state embodied in blowable fuses of the microprocessor |
| JP5261738B2 (ja) * | 2009-01-15 | 2013-08-14 | 国立大学法人広島大学 | 半導体装置 |
| US9747105B2 (en) * | 2009-12-17 | 2017-08-29 | Intel Corporation | Method and apparatus for performing a shift and exclusive or operation in a single instruction |
| CN104012000B (zh) * | 2011-10-24 | 2017-03-08 | 天工方案公司 | 双模式功率放大器控制接口 |
-
2013
- 2013-07-29 JP JP2013157090A patent/JP6219631B2/ja active Active
-
2014
- 2014-06-03 TW TW103119252A patent/TWI562059B/zh active
- 2014-06-09 CN CN201480042802.7A patent/CN105432018B/zh active Active
- 2014-06-09 EP EP14831256.4A patent/EP3029839B1/en active Active
- 2014-06-09 WO PCT/JP2014/065245 patent/WO2015015905A1/ja not_active Ceased
- 2014-06-09 US US14/908,339 patent/US9866219B2/en active Active
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