JP2015012609A5 - - Google Patents

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Publication number
JP2015012609A5
JP2015012609A5 JP2014124203A JP2014124203A JP2015012609A5 JP 2015012609 A5 JP2015012609 A5 JP 2015012609A5 JP 2014124203 A JP2014124203 A JP 2014124203A JP 2014124203 A JP2014124203 A JP 2014124203A JP 2015012609 A5 JP2015012609 A5 JP 2015012609A5
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JP
Japan
Prior art keywords
amplifier
circuit
package
substrate
wire bonds
Prior art date
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Granted
Application number
JP2014124203A
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English (en)
Japanese (ja)
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JP6530893B2 (ja
JP2015012609A (ja
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Publication date
Priority claimed from US13/929,688 external-priority patent/US9401342B2/en
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Publication of JP2015012609A publication Critical patent/JP2015012609A/ja
Publication of JP2015012609A5 publication Critical patent/JP2015012609A5/ja
Application granted granted Critical
Publication of JP6530893B2 publication Critical patent/JP6530893B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2014124203A 2013-06-27 2014-06-17 結合を低減するためのワイヤボンド壁を有する半導体パッケージ Active JP6530893B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/929,688 2013-06-27
US13/929,688 US9401342B2 (en) 2013-06-27 2013-06-27 Semiconductor package having wire bond wall to reduce coupling

Publications (3)

Publication Number Publication Date
JP2015012609A JP2015012609A (ja) 2015-01-19
JP2015012609A5 true JP2015012609A5 (enExample) 2017-07-13
JP6530893B2 JP6530893B2 (ja) 2019-06-12

Family

ID=52115008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014124203A Active JP6530893B2 (ja) 2013-06-27 2014-06-17 結合を低減するためのワイヤボンド壁を有する半導体パッケージ

Country Status (3)

Country Link
US (1) US9401342B2 (enExample)
JP (1) JP6530893B2 (enExample)
CN (1) CN104253095B (enExample)

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US9312817B2 (en) * 2012-07-20 2016-04-12 Freescale Semiconductor, Inc. Semiconductor package design providing reduced electromagnetic coupling between circuit components
US9240390B2 (en) 2013-06-27 2016-01-19 Freescale Semiconductor, Inc. Semiconductor packages having wire bond wall to reduce coupling
US9450547B2 (en) 2013-12-12 2016-09-20 Freescale Semiconductor, Inc. Semiconductor package having an isolation wall to reduce electromagnetic coupling
CN107750478B (zh) * 2015-06-22 2021-06-01 瑞典爱立信有限公司 无埋块rf功率放大器
US10842028B2 (en) 2015-06-22 2020-11-17 Telefonaktiebolaget Lm Ericsson (Publ) Method for mounting a power amplifier (AP) assembly
US9607953B1 (en) * 2016-02-24 2017-03-28 Nxp Usa, Inc. Semiconductor package with isolation wall
US10249582B2 (en) 2016-12-19 2019-04-02 Nxp Usa, Inc. Radio frequency (RF) devices with resonant circuits to reduce coupling
JP2018107364A (ja) * 2016-12-28 2018-07-05 ルネサスエレクトロニクス株式会社 半導体装置
JP6852841B2 (ja) * 2016-12-28 2021-03-31 住友電工デバイス・イノベーション株式会社 半導体装置
WO2020039474A1 (ja) * 2018-08-20 2020-02-27 三菱電機株式会社 ドハティ増幅器
US10506704B1 (en) 2018-08-21 2019-12-10 Nxp Usa, Inc. Electromagnetically-shielded microelectronic assemblies and methods for the fabrication thereof
US10833238B2 (en) * 2018-08-27 2020-11-10 International Business Machines Corporation Wirebond cross-talk reduction for quantum computing chips
US10629518B2 (en) 2018-08-29 2020-04-21 Nxp Usa, Inc. Internally-shielded microelectronic packages and methods for the fabrication thereof
US11071197B2 (en) 2018-09-21 2021-07-20 International Business Machines Corporation Multilayer ceramic electronic package with modulated mesh topology and alternating rods
US11011813B2 (en) * 2019-07-12 2021-05-18 Nxp B.V. Power amplifier with shielded transmission lines
US11108361B2 (en) * 2019-08-15 2021-08-31 Nxp Usa, Inc. Integrated multiple-path power amplifier with interdigitated transistors
US11349438B2 (en) 2019-12-30 2022-05-31 Nxp Usa, Inc. Power amplifier packages containing multi-path integrated passive devices

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US7525813B2 (en) 1998-07-06 2009-04-28 Renesas Technology Corp. Semiconductor device
US6072211A (en) 1998-08-03 2000-06-06 Motorola, Inc. Semiconductor package
US6261868B1 (en) 1999-04-02 2001-07-17 Motorola, Inc. Semiconductor component and method for manufacturing the semiconductor component
US7446411B2 (en) 2005-10-24 2008-11-04 Freescale Semiconductor, Inc. Semiconductor structure and method of assembly
US7429790B2 (en) 2005-10-24 2008-09-30 Freescale Semiconductor, Inc. Semiconductor structure and method of manufacture
JP4703391B2 (ja) * 2005-12-19 2011-06-15 株式会社東芝 高周波電力増幅器
US7445967B2 (en) 2006-01-20 2008-11-04 Freescale Semiconductor, Inc. Method of packaging a semiconductor die and package thereof
US8228123B2 (en) * 2007-08-29 2012-07-24 Nxp B.V. Integrated Doherty amplifier
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US8030763B2 (en) 2008-06-26 2011-10-04 Freescale Semiconductor, Inc. Semiconductor package with reduced inductive coupling between adjacent bondwire arrays
US8564091B2 (en) 2009-07-06 2013-10-22 Marvell World Trade Ltd. Die-to-die electrical isolation in a semiconductor package
JP5229276B2 (ja) * 2010-06-11 2013-07-03 株式会社村田製作所 回路モジュール
KR101141381B1 (ko) 2010-08-16 2012-07-13 삼성전기주식회사 크로스토크 저감을 위한 통신 회로
JP2012222491A (ja) * 2011-04-06 2012-11-12 Hitachi Metals Ltd モジュール
US9419566B2 (en) * 2011-04-20 2016-08-16 Freescale Semiconductor, Inc. Amplifiers and related integrated circuits
JP2013074249A (ja) * 2011-09-29 2013-04-22 Oki Electric Ind Co Ltd 半導体パッケージ、及び半導体パッケージの製造方法
US9312817B2 (en) * 2012-07-20 2016-04-12 Freescale Semiconductor, Inc. Semiconductor package design providing reduced electromagnetic coupling between circuit components
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US9240390B2 (en) 2013-06-27 2016-01-19 Freescale Semiconductor, Inc. Semiconductor packages having wire bond wall to reduce coupling
US9450547B2 (en) * 2013-12-12 2016-09-20 Freescale Semiconductor, Inc. Semiconductor package having an isolation wall to reduce electromagnetic coupling

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