JP2014509455A5 - - Google Patents

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Publication number
JP2014509455A5
JP2014509455A5 JP2013555572A JP2013555572A JP2014509455A5 JP 2014509455 A5 JP2014509455 A5 JP 2014509455A5 JP 2013555572 A JP2013555572 A JP 2013555572A JP 2013555572 A JP2013555572 A JP 2013555572A JP 2014509455 A5 JP2014509455 A5 JP 2014509455A5
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JP
Japan
Prior art keywords
layer
pad
metal
bondable
pads
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Application number
JP2013555572A
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English (en)
Japanese (ja)
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JP2014509455A (ja
JP6116488B2 (ja
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Priority claimed from US13/351,579 external-priority patent/US8643165B2/en
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Publication of JP2014509455A publication Critical patent/JP2014509455A/ja
Publication of JP2014509455A5 publication Critical patent/JP2014509455A5/ja
Application granted granted Critical
Publication of JP6116488B2 publication Critical patent/JP6116488B2/ja
Active legal-status Critical Current
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JP2013555572A 2011-02-23 2012-02-23 塊状端子を備える半導体パッケージ Active JP6116488B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201161445630P 2011-02-23 2011-02-23
US61/445,630 2011-02-23
US13/351,579 US8643165B2 (en) 2011-02-23 2012-01-17 Semiconductor device having agglomerate terminals
US13/351,579 2012-01-17
PCT/US2012/026378 WO2012116218A2 (en) 2011-02-23 2012-02-23 Semiconductor packages with agglomerate terminals

Publications (3)

Publication Number Publication Date
JP2014509455A JP2014509455A (ja) 2014-04-17
JP2014509455A5 true JP2014509455A5 (https=) 2015-04-16
JP6116488B2 JP6116488B2 (ja) 2017-04-19

Family

ID=46652081

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013555572A Active JP6116488B2 (ja) 2011-02-23 2012-02-23 塊状端子を備える半導体パッケージ

Country Status (4)

Country Link
US (2) US8643165B2 (https=)
JP (1) JP6116488B2 (https=)
CN (1) CN103403864B (https=)
WO (1) WO2012116218A2 (https=)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103907185B (zh) * 2011-08-11 2016-10-19 联达科技控股有限公司 具有多材料印刷形成的包装部件的引线载体
US8586480B1 (en) * 2012-07-31 2013-11-19 Ixys Corporation Power MOSFET having selectively silvered pads for clip and bond wire attach
KR101988890B1 (ko) * 2012-10-30 2019-10-01 한국전자통신연구원 솔더 온 패드의 제조방법 및 그를 이용한 플립 칩 본딩 방법
JP6146642B2 (ja) * 2012-11-30 2017-06-14 大日本印刷株式会社 半導体装置用基板の製造方法および樹脂封止型半導体装置の製造方法
US8815648B1 (en) 2013-04-01 2014-08-26 Texas Instruments Incorporated Multi-step sintering of metal paste for semiconductor device wire bonding
US9978667B2 (en) * 2013-08-07 2018-05-22 Texas Instruments Incorporated Semiconductor package with lead frame and recessed solder terminals
US11217515B2 (en) * 2014-09-11 2022-01-04 Semiconductor Components Industries, Llc Semiconductor package structures and methods of manufacture
US10847691B2 (en) * 2014-12-11 2020-11-24 Luminus, Inc. LED flip chip structures with extended contact pads formed by sintering silver
US9640468B2 (en) * 2014-12-24 2017-05-02 Stmicroelectronics S.R.L. Process for manufacturing a package for a surface-mount semiconductor device and semiconductor device
HK1247441A1 (zh) * 2015-05-04 2018-09-21 由普莱克斯有限公司 不具有裸片附接垫的引线载体结构和由此形成的封装
JP2018518827A (ja) * 2015-05-04 2018-07-12 イーオープレックス リミテッド プリント形成パッケージ部品と導電パス再配線構造体のリードキャリア
US10727085B2 (en) * 2015-12-30 2020-07-28 Texas Instruments Incorporated Printed adhesion deposition to mitigate integrated circuit package delamination
US9896330B2 (en) * 2016-01-13 2018-02-20 Texas Instruments Incorporated Structure and method for packaging stress-sensitive micro-electro-mechanical system stacked onto electronic circuit chip
SG11201909822TA (en) * 2017-04-21 2019-11-28 Mitsui Chemicals Inc Semiconductor substrate manufacturing method, semiconductor device, and method for manufacturing same
US10405417B2 (en) * 2017-05-01 2019-09-03 Nxp Usa, Inc. Packaged microelectronic component mounting using sinter attachment
FR3083920B1 (fr) * 2018-07-13 2024-12-13 Linxens Holding Procede de fabrication de boitiers de composant electronique et boitier de composant electronique obtenu par ce procede
CN110391143A (zh) * 2019-07-02 2019-10-29 东莞链芯半导体科技有限公司 半导体封装结构及其封装方法
US11495557B2 (en) * 2020-03-20 2022-11-08 Advanced Semiconductor Engineering, Inc. Semiconductor device and method of manufacturing the same
US11562947B2 (en) * 2020-07-06 2023-01-24 Panjit International Inc. Semiconductor package having a conductive pad with an anchor flange
CN113814597A (zh) * 2021-10-28 2021-12-21 株洲中车时代半导体有限公司 电子器件的焊接方法
CN114883284A (zh) * 2022-03-25 2022-08-09 清华大学 碳化硅芯片的耐高温封装结构及其制备方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5318651A (en) * 1991-11-27 1994-06-07 Nec Corporation Method of bonding circuit boards
JP2001250884A (ja) * 2000-03-08 2001-09-14 Sanyo Electric Co Ltd 回路装置の製造方法
KR100647238B1 (ko) 2000-10-25 2006-11-17 하리마카세이 가부시기가이샤 도전성 금속 페이스트 및 그 제조 방법
DE10206818A1 (de) 2002-02-18 2003-08-28 Infineon Technologies Ag Elektronisches Bauteil mit Klebstoffschicht und Verfahren zur Herstellung derselben
WO2004026526A1 (en) 2002-09-18 2004-04-01 Ebara Corporation Bonding material and bonding method
DE10245451B4 (de) * 2002-09-27 2005-07-28 Infineon Technologies Ag Elektronisches Bauteil mit einem Halbleiterchip, der flexible Chipkontakte aufweist, und Verfahren zur Herstellung desselben, sowie Halbleiterwafer
CN100409423C (zh) * 2003-02-05 2008-08-06 千住金属工业株式会社 端子间的连接方法及半导体装置的安装方法
EP1626614B1 (en) 2003-05-16 2013-08-28 Harima Chemicals, Inc. Method for forming fine copper particle sintered product type of electric conductor having fine shape, method for forming fine copper wiring and thin copper film
TWI331345B (en) 2003-09-12 2010-10-01 Nat Inst Of Advanced Ind Scien A dispersion of nano-size metal particles and a process for forming a layer of an electric conductor with use thereof
US8053171B2 (en) * 2004-01-16 2011-11-08 Semiconductor Energy Laboratory Co., Ltd. Substrate having film pattern and manufacturing method of the same, manufacturing method of semiconductor device, liquid crystal television, and EL television
JP4496216B2 (ja) 2004-06-23 2010-07-07 ハリマ化成株式会社 導電性金属ペースト
KR101091896B1 (ko) * 2004-09-04 2011-12-08 삼성테크윈 주식회사 플립칩 반도체 패키지 및 그 제조방법
US7550319B2 (en) * 2005-09-01 2009-06-23 E. I. Du Pont De Nemours And Company Low temperature co-fired ceramic (LTCC) tape compositions, light emitting diode (LED) modules, lighting devices and method of forming thereof
US7982307B2 (en) * 2006-11-22 2011-07-19 Agere Systems Inc. Integrated circuit chip assembly having array of thermally conductive features arranged in aperture of circuit substrate
JP2008153470A (ja) 2006-12-18 2008-07-03 Renesas Technology Corp 半導体装置および半導体装置の製造方法
US7955901B2 (en) * 2007-10-04 2011-06-07 Infineon Technologies Ag Method for producing a power semiconductor module comprising surface-mountable flat external contacts
US7836586B2 (en) 2008-08-21 2010-11-23 National Semiconductor Corporation Thin foil semiconductor package
US7754533B2 (en) 2008-08-28 2010-07-13 Infineon Technologies Ag Method of manufacturing a semiconductor device
US9041228B2 (en) * 2008-12-23 2015-05-26 Micron Technology, Inc. Molding compound including a carbon nano-tube dispersion
JP5617210B2 (ja) * 2009-09-14 2014-11-05 デクセリアルズ株式会社 光反射性異方性導電接着剤及び発光装置
JP5532419B2 (ja) * 2010-06-17 2014-06-25 富士電機株式会社 絶縁材、金属ベース基板および半導体モジュール並びにこれらの製造方法

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