JP2014509455A5 - - Google Patents

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Publication number
JP2014509455A5
JP2014509455A5 JP2013555572A JP2013555572A JP2014509455A5 JP 2014509455 A5 JP2014509455 A5 JP 2014509455A5 JP 2013555572 A JP2013555572 A JP 2013555572A JP 2013555572 A JP2013555572 A JP 2013555572A JP 2014509455 A5 JP2014509455 A5 JP 2014509455A5
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JP
Japan
Prior art keywords
layer
pad
metal
bondable
pads
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Application number
JP2013555572A
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English (en)
Japanese (ja)
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JP2014509455A (ja
JP6116488B2 (ja
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Priority claimed from US13/351,579 external-priority patent/US8643165B2/en
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Publication of JP2014509455A publication Critical patent/JP2014509455A/ja
Publication of JP2014509455A5 publication Critical patent/JP2014509455A5/ja
Application granted granted Critical
Publication of JP6116488B2 publication Critical patent/JP6116488B2/ja
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JP2013555572A 2011-02-23 2012-02-23 塊状端子を備える半導体パッケージ Active JP6116488B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201161445630P 2011-02-23 2011-02-23
US61/445,630 2011-02-23
US13/351,579 2012-01-17
US13/351,579 US8643165B2 (en) 2011-02-23 2012-01-17 Semiconductor device having agglomerate terminals
PCT/US2012/026378 WO2012116218A2 (en) 2011-02-23 2012-02-23 Semiconductor packages with agglomerate terminals

Publications (3)

Publication Number Publication Date
JP2014509455A JP2014509455A (ja) 2014-04-17
JP2014509455A5 true JP2014509455A5 (https=) 2015-04-16
JP6116488B2 JP6116488B2 (ja) 2017-04-19

Family

ID=46652081

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013555572A Active JP6116488B2 (ja) 2011-02-23 2012-02-23 塊状端子を備える半導体パッケージ

Country Status (4)

Country Link
US (2) US8643165B2 (https=)
JP (1) JP6116488B2 (https=)
CN (1) CN103403864B (https=)
WO (1) WO2012116218A2 (https=)

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US8586480B1 (en) * 2012-07-31 2013-11-19 Ixys Corporation Power MOSFET having selectively silvered pads for clip and bond wire attach
KR101988890B1 (ko) * 2012-10-30 2019-10-01 한국전자통신연구원 솔더 온 패드의 제조방법 및 그를 이용한 플립 칩 본딩 방법
JP6146642B2 (ja) * 2012-11-30 2017-06-14 大日本印刷株式会社 半導体装置用基板の製造方法および樹脂封止型半導体装置の製造方法
US8815648B1 (en) 2013-04-01 2014-08-26 Texas Instruments Incorporated Multi-step sintering of metal paste for semiconductor device wire bonding
US9978667B2 (en) * 2013-08-07 2018-05-22 Texas Instruments Incorporated Semiconductor package with lead frame and recessed solder terminals
US11217515B2 (en) * 2014-09-11 2022-01-04 Semiconductor Components Industries, Llc Semiconductor package structures and methods of manufacture
US10847691B2 (en) * 2014-12-11 2020-11-24 Luminus, Inc. LED flip chip structures with extended contact pads formed by sintering silver
US9640468B2 (en) * 2014-12-24 2017-05-02 Stmicroelectronics S.R.L. Process for manufacturing a package for a surface-mount semiconductor device and semiconductor device
US20180047589A1 (en) * 2015-05-04 2018-02-15 Eoplex Limited Lead carrier with print formed package components and conductive path redistribution structures
CN107912069A (zh) * 2015-05-04 2018-04-13 由普莱克斯有限公司 不具有裸片附接垫的引线载体结构和由此形成的封装
US10727085B2 (en) * 2015-12-30 2020-07-28 Texas Instruments Incorporated Printed adhesion deposition to mitigate integrated circuit package delamination
US9896330B2 (en) * 2016-01-13 2018-02-20 Texas Instruments Incorporated Structure and method for packaging stress-sensitive micro-electro-mechanical system stacked onto electronic circuit chip
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FR3083920B1 (fr) * 2018-07-13 2024-12-13 Linxens Holding Procede de fabrication de boitiers de composant electronique et boitier de composant electronique obtenu par ce procede
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US11495557B2 (en) * 2020-03-20 2022-11-08 Advanced Semiconductor Engineering, Inc. Semiconductor device and method of manufacturing the same
US11562947B2 (en) * 2020-07-06 2023-01-24 Panjit International Inc. Semiconductor package having a conductive pad with an anchor flange
CN113814597A (zh) * 2021-10-28 2021-12-21 株洲中车时代半导体有限公司 电子器件的焊接方法
CN114883284A (zh) * 2022-03-25 2022-08-09 清华大学 碳化硅芯片的耐高温封装结构及其制备方法

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