JP2014143419A5 - - Google Patents
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- JP2014143419A5 JP2014143419A5 JP2014009652A JP2014009652A JP2014143419A5 JP 2014143419 A5 JP2014143419 A5 JP 2014143419A5 JP 2014009652 A JP2014009652 A JP 2014009652A JP 2014009652 A JP2014009652 A JP 2014009652A JP 2014143419 A5 JP2014143419 A5 JP 2014143419A5
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- JP
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- Prior art keywords
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- semiconductor
- drift
- drain
- semiconductor region
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- 239000004065 semiconductor Substances 0.000 claims description 78
- 239000000758 substrate Substances 0.000 claims description 20
- 239000002019 doping agent Substances 0.000 claims description 9
- 238000002955 isolation Methods 0.000 claims description 8
- 239000002800 charge carrier Substances 0.000 claims description 4
- 230000000737 periodic effect Effects 0.000 claims description 2
- 238000000034 method Methods 0.000 description 6
- 238000000137 annealing Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/748,076 | 2013-01-23 | ||
| US13/748,076 US9490322B2 (en) | 2013-01-23 | 2013-01-23 | Semiconductor device with enhanced 3D resurf |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014143419A JP2014143419A (ja) | 2014-08-07 |
| JP2014143419A5 true JP2014143419A5 (https=) | 2017-02-23 |
| JP6261122B2 JP6261122B2 (ja) | 2018-01-17 |
Family
ID=51191261
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014009652A Active JP6261122B2 (ja) | 2013-01-23 | 2014-01-22 | 3次元的な表面電界緩和が増強された半導体デバイス |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US9490322B2 (https=) |
| JP (1) | JP6261122B2 (https=) |
| CN (1) | CN103943668B (https=) |
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| US9490322B2 (en) | 2013-01-23 | 2016-11-08 | Freescale Semiconductor, Inc. | Semiconductor device with enhanced 3D resurf |
| KR102068842B1 (ko) * | 2013-04-16 | 2020-02-12 | 매그나칩 반도체 유한회사 | 반도체 전력소자 |
| US9728600B2 (en) * | 2015-09-11 | 2017-08-08 | Nxp Usa, Inc. | Partially biased isolation in semiconductor devices |
| US9543303B1 (en) * | 2016-02-02 | 2017-01-10 | Richtek Technology Corporation | Complementary metal oxide semiconductor device with dual-well and manufacturing method thereof |
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| US9871135B2 (en) | 2016-06-02 | 2018-01-16 | Nxp Usa, Inc. | Semiconductor device and method of making |
| US9768028B1 (en) | 2016-08-10 | 2017-09-19 | Globalfoundries Inc. | Semiconductor structure with a dopant implant region having a linearly graded conductivity level and method of forming the structure |
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| US10510831B2 (en) * | 2018-02-19 | 2019-12-17 | Globalfoundries Singapore Pte. Ltd. | Low on resistance high voltage metal oxide semiconductor transistor |
| US10756187B1 (en) | 2019-03-28 | 2020-08-25 | Texas Instruments Incorporated | Extended drain MOS with dual well isolation |
| CN110010473A (zh) * | 2019-04-18 | 2019-07-12 | 北京顿思集成电路设计有限责任公司 | 一种ldmos器件以及制作方法 |
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| CN112466956B (zh) * | 2020-12-15 | 2023-03-24 | 武汉新芯集成电路制造有限公司 | 半导体器件及其制造方法 |
| CN115706163B (zh) * | 2021-08-05 | 2026-04-14 | 联华电子股份有限公司 | 高压晶体管结构及其制造方法 |
| CN116613067A (zh) * | 2022-02-08 | 2023-08-18 | 联华电子股份有限公司 | 高压晶体管及其制作方法 |
| CN114784106A (zh) * | 2022-03-31 | 2022-07-22 | 西安电子科技大学 | 一种具有额外电极的折叠硅ldmos及其制作方法 |
| CN117790540A (zh) * | 2022-09-20 | 2024-03-29 | 苏州华太电子技术股份有限公司 | 超结ldmos器件以及制造其的方法 |
| CN115881778B (zh) * | 2023-01-19 | 2023-05-05 | 北京智芯微电子科技有限公司 | 横向双扩散场效应晶体管、制作方法、芯片及电路 |
| US20240405124A1 (en) * | 2023-06-01 | 2024-12-05 | Allegro Microsystems, Llc | Method to implant p-type and/or n-type rings in a semiconductor device |
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-
2013
- 2013-01-23 US US13/748,076 patent/US9490322B2/en active Active
-
2014
- 2014-01-22 JP JP2014009652A patent/JP6261122B2/ja active Active
- 2014-01-22 CN CN201410028850.2A patent/CN103943668B/zh active Active
-
2016
- 2016-11-01 US US15/340,848 patent/US9691880B2/en active Active
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