JP2013538466A - 基板貫通ビアを備えた集積回路 - Google Patents
基板貫通ビアを備えた集積回路 Download PDFInfo
- Publication number
- JP2013538466A JP2013538466A JP2013529269A JP2013529269A JP2013538466A JP 2013538466 A JP2013538466 A JP 2013538466A JP 2013529269 A JP2013529269 A JP 2013529269A JP 2013529269 A JP2013529269 A JP 2013529269A JP 2013538466 A JP2013538466 A JP 2013538466A
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- JP
- Japan
- Prior art keywords
- tsv
- tip
- metal layer
- protruding
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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- 239000000758 substrate Substances 0.000 title claims abstract description 9
- 239000002184 metal Substances 0.000 claims abstract description 134
- 229910052751 metal Inorganic materials 0.000 claims abstract description 134
- 229910000679 solder Inorganic materials 0.000 claims abstract description 41
- 238000002161 passivation Methods 0.000 claims abstract description 20
- 238000000034 method Methods 0.000 claims description 31
- 239000004065 semiconductor Substances 0.000 claims description 17
- 238000007747 plating Methods 0.000 claims description 16
- 238000000151 deposition Methods 0.000 claims description 9
- 238000007772 electroless plating Methods 0.000 claims description 8
- 238000005229 chemical vapour deposition Methods 0.000 claims description 7
- 229910052763 palladium Inorganic materials 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910052804 chromium Inorganic materials 0.000 claims description 4
- 229910052703 rhodium Inorganic materials 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 2
- 239000000126 substance Substances 0.000 claims description 2
- 241000724291 Tobacco streak virus Species 0.000 abstract description 4
- 229910000765 intermetallic Inorganic materials 0.000 description 19
- 239000010949 copper Substances 0.000 description 15
- 230000008569 process Effects 0.000 description 9
- 230000004888 barrier function Effects 0.000 description 8
- 238000005755 formation reaction Methods 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 230000001934 delay Effects 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 229920000642 polymer Polymers 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 239000003870 refractory metal Substances 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910007637 SnAg Inorganic materials 0.000 description 1
- 229910004166 TaN Inorganic materials 0.000 description 1
- 229910004200 TaSiN Inorganic materials 0.000 description 1
- 229910008482 TiSiN Inorganic materials 0.000 description 1
- 229910008599 TiW Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- -1 for example Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- QRXWMOHMRWLFEY-UHFFFAOYSA-N isoniazide Chemical compound NNC(=O)C1=CC=NC=C1 QRXWMOHMRWLFEY-UHFFFAOYSA-N 0.000 description 1
- 230000001404 mediated effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920000052 poly(p-xylylene) Polymers 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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Abstract
Description
Claims (15)
- シリコン貫通ビア(TSV)ダイを形成する方法であって、
側壁を含み、かつ外部誘電体スリーブ及び内部金属コアを含むTSVの突出するTSVティップの末端部上のはんだを除いて第1の金属層をめっきすること、及び
前記第1の金属層上の前記第1の金属層とは異なるはんだを除いて第2の金属層をめっきすること、
を含み、
前記第1の金属層が前記第2の金属層と共に、前記突出するTSVティップのための球状末端ティップ端を提供し、前記球状末端ティップ端が、前記TSV側壁の一部と前記外部誘電体スリーブの最上表面とを覆い、前記球状末端ティップ端が、前記球状末端ティップ端より下の前記突出するTSVティップの断面エリアに比べ25%大きいものに等しいかそれより大きい断面エリアを有する、
方法。 - 請求項1に記載の方法であって、前記第1の金属層を前記めっきすること及び前記第2の金属層を前記めっきすることの両方が、選択性無電解めっきすることを含み、前記球状末端ティップ端が、前記突出するTSVティップの前記末端部上に選択的に形成される、方法。
- 請求項2に記載の方法であって、
前記TSVダイが、複数の前記TSVダイを含むウエハ上にあり、前記複数のTSVダイの各々が、能動回路要素を含む頂部側半導体表面、及び底部側表面を有し、複数の前記TSVを含み、前記複数のTSVが、前記頂部側半導体表面上の前記能動回路要素から、前記底部側表面から出現する前記突出するTSVティップまで延び、前記突出するTSVティップが側壁を含み、
前記方法が、前記選択性無電解めっきする前に、
前記突出するTSVティップの上を含む前記ウエハの前記底部側表面上にパッシベーション層を堆積すること、及び
前記突出するTSVティップの末端部を現わすように前記パッシベーション層をエッチングすることであって、前記内部金属コアの一部を露出させることを含むこと、
を更に含み、前記パッシベーション層を前記エッチングした後、前記突出するTSVティップと前記側壁の一部との横の前記ウエハの前記底部側表面を覆い続ける、
方法。 - 請求項3に記載の方法であって、前記堆積することが化学気相成長(CVD)を含み、前記パッシベーション層がシリコンナイトライド又はシリコンオキシナイトライドを含み、前記エッチングすることが化学機械研磨(CMP)を含む、方法。
- 請求項1に記載の方法であって、前記第1の金属層が、Ni、Pd、Co、Cr、Rh、NiP、NiB、CoWP、又はCoPを含む、方法。
- 請求項5に記載の方法であって、前記第1の金属層がNiを含み、第2の金属層がCu又はPdを含み、前記第2の金属層上にAu層を堆積することを更に含む、方法。
- 請求項1に記載の方法であって、前記外部誘電体スリーブが、前記突出するTSVティップの前記側壁に沿って中間の距離(Di)まで延び、前記突出するTSVティップの長さの1/3≦Di≦前記突出するTSVティップの前記長さ−1μmである、方法。
- 基板貫通ビア(TSV)ダイであって、
能動回路要素を含む頂部側半導体表面及び底部側表面、
側壁を含み、外部誘電体スリーブ及び内部金属コアを含む複数のTSVであって、前記頂部側半導体表面上の前記能動回路要素から、前記底部側表面から出現する突出するTSVティップまで延び、前記突出するTSVティップが側壁を含む、前記複数のTSV、
前記突出するTSVティップの前記側壁の一部の上を含む前記突出するTSVティップの横のパッシベーション層であって、前記内部金属コアの露出された部分を提供するため前記突出するTSVティップの末端部にはない、前記パッシベーション層、
前記突出するTSVティップの前記露出された部分を覆うはんだ以外の第1の金属を含む第1の金属層、及び
前記第1の金属層上の前記第1の金属とは異なるはんだ以外の第2の金属を含む第2の金属層、
を含み、
前記第1の金属層が前記第2の金属層と共に、前記突出するTSVティップのための球状末端ティップ端を提供し、前記球状末端ティップ端が、前記TSV側壁の一部と前記外部誘電体スリーブの最上表面とを覆い、前記球状末端ティップ端が、前記球状末端ティップ端より下の前記突出するTSVティップの断面エリアに比べ25%大きいものに等しいかそれより大きいそれより大きい断面エリアを有する、
TSVダイ。 - 請求項8に記載のTSVダイであって、前記球状末端ティップ端が、前記球状末端ティップ端より下の前記突出するTSVティップの断面エリアに比べ40%大きいものに等しいかそれより大きい断面エリアを提供する、TSVダイ。
- 請求項8に記載のTSVダイであって、前記第1の金属が、Ni、Pd、Co、Cr、Rh、NiP、NiB、CoWP、又はCoPを含む、TSVダイ。
- 請求項10に記載のTSVダイであって、前記第1の金属がNiを含み、前記第2の金属がCu又はPdを含み、前記第2の金属層上のAu層を更に含む、TSVダイ。
- 請求項8に記載のTSVダイであって、前記外部誘電体スリーブが、前記突出するTSVティップの前記側壁に沿って中間の距離(Di)まで延び、前記突出するTSVティップの長さの1/3≦Di≦前記突出するTSVティップの前記長さ−1μmである、TSVダイ。
- 積層された集積回路(IC)デバイスであって、
能動回路要素を含む頂部側半導体表面及び底部側表面、
外部誘電体スリーブ及び内部金属コアを含む側壁を含む複数の基板貫通ビア(TSV)であって、前記頂部側半導体表面上の前記能動回路要素から、前記底部側表面から出現する突出するTSVティップまで延びる前記複数のTSVであって、前記突出するTSVティップが側壁を含む、前記複数のTSV、
前記突出するTSVティップの前記側壁の一部を含む前記突出するTSVティップの横の前記底部側表面上のパッシベーション層であって、前記内部金属コアの露出された部分を含む前記突出するTSVティップの末端にはない、前記パッシベーション層、及び
前記第1のICダイの前記球状末端ティップ端への接合で接合される複数の突出するボンディング特徴を有する第2のICダイ、
を含み、
前記突出するTSVティップが、前記突出するTSVティップの前記末端部上の球状末端ティップ端を含む前記球状末端ティップ端であって、前記球状末端ティップ端が、
はんだ以外の第1の金属を含む第1の金属層と、
前記第1の金属層上の前記第1の金属とは異なるはんだ以外の第2の金属を含む第2の金属層と、
を含み、
前記第1の金属層が前記第2の金属層と共に、前記突出するTSVティップのための球状末端ティップ端を提供し、前記球状末端ティップ端が、前記TSV側壁の一部と前記外部誘電体スリーブの最上表面とを覆い、前記球状末端ティップ端が、前記球状末端ティップ端より下の前記突出するTSVティップの断面エリアに比べ25%大きいものに等しいかそれより大きい断面エリアを有する、
ICデバイス。 - 請求項13に記載の積層されたICデバイスであって、前記第1の金属が、Ni、Pd、Co、Cr、Rh、NiP、NiB、CoWP、又はCoPを含む、積層されたICデバイス。
- 請求項14に記載の積層されたICデバイスであって、前記外部誘電体スリーブが、前記突出するTSVティップの前記側壁に沿って中間の距離(Di)まで延び、前記突出するTSVティップの長さの1/3≦Di≦前記突出するTSVティップの前記長さ−1μmである、積層されたICデバイス。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016525274A (ja) * | 2013-08-06 | 2016-08-22 | クアルコム,インコーポレイテッド | ダイ上の積層再分配層 |
KR20180043382A (ko) * | 2015-09-14 | 2018-04-27 | 마이크론 테크놀로지, 인크 | 언더-범프 금속 구조체용 칼라 및 관련 시스템 및 방법 |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8227295B2 (en) * | 2008-10-16 | 2012-07-24 | Texas Instruments Incorporated | IC die having TSV and wafer level underfill and stacked IC devices comprising a workpiece solder connected to the TSV |
KR20130053338A (ko) * | 2011-11-15 | 2013-05-23 | 삼성전자주식회사 | Tsv 구조를 구비한 집적회로 소자 |
US9129943B1 (en) * | 2012-03-29 | 2015-09-08 | Amkor Technology, Inc. | Embedded component package and fabrication method |
US20130313710A1 (en) * | 2012-05-22 | 2013-11-28 | Micron Technology, Inc. | Semiconductor Constructions and Methods of Forming Semiconductor Constructions |
US8709936B2 (en) * | 2012-07-31 | 2014-04-29 | International Business Machines Corporation | Method and structure of forming backside through silicon via connections |
KR101972969B1 (ko) * | 2012-08-20 | 2019-04-29 | 에스케이하이닉스 주식회사 | 반도체 소자 및 그 제조 방법 |
CN202816916U (zh) * | 2012-10-10 | 2013-03-20 | 矽力杰半导体技术(杭州)有限公司 | 一种倒装封装装置 |
US9034752B2 (en) | 2013-01-03 | 2015-05-19 | Micron Technology, Inc. | Methods of exposing conductive vias of semiconductor devices and associated structures |
US9059111B2 (en) | 2013-04-11 | 2015-06-16 | International Business Machines Corporation | Reliable back-side-metal structure |
US9281274B1 (en) | 2013-09-27 | 2016-03-08 | Stats Chippac Ltd. | Integrated circuit through-substrate via system with a buffer layer and method of manufacture thereof |
US9318414B2 (en) | 2013-10-29 | 2016-04-19 | Globalfoundries Inc. | Integrated circuit structure with through-semiconductor via |
US9318413B2 (en) | 2013-10-29 | 2016-04-19 | Globalfoundries Inc. | Integrated circuit structure with metal cap and methods of fabrication |
KR20150109213A (ko) * | 2014-03-19 | 2015-10-01 | 에스케이하이닉스 주식회사 | 관통 전극을 갖는 반도체 소자 및 그 제조방법 |
US10163705B2 (en) * | 2014-04-28 | 2018-12-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Profile of through via protrusion in 3DIC interconnect |
KR102320821B1 (ko) | 2014-09-11 | 2021-11-02 | 삼성전자주식회사 | 반도체 패키지 |
DE102014115105B4 (de) | 2014-10-09 | 2023-06-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Halbleitereinrichtung und Verfahren zur Herstellung einer Halbleitereinrichtung |
CN104733398A (zh) * | 2015-03-31 | 2015-06-24 | 武汉新芯集成电路制造有限公司 | 一种晶圆三维集成引线工艺 |
US9472490B1 (en) | 2015-08-12 | 2016-10-18 | GlobalFoundries, Inc. | IC structure with recessed solder bump area and methods of forming same |
US10418311B2 (en) | 2017-03-28 | 2019-09-17 | Micron Technology, Inc. | Method of forming vias using silicon on insulator substrate |
CN107910327B (zh) * | 2017-11-07 | 2024-05-14 | 长鑫存储技术有限公司 | 电容器阵列结构及其制造方法 |
US10957625B2 (en) * | 2017-12-29 | 2021-03-23 | Micron Technology, Inc. | Pillar-last methods for forming semiconductor devices |
KR20220090793A (ko) | 2020-12-23 | 2022-06-30 | 삼성전자주식회사 | 반도체 패키지 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004165295A (ja) * | 2002-11-11 | 2004-06-10 | Murata Mfg Co Ltd | セラミック多層基板およびその製造方法 |
JP2005286184A (ja) * | 2004-03-30 | 2005-10-13 | Nec Electronics Corp | 貫通電極、それを用いたスペーサー、およびそれらの製造方法 |
JP2009277719A (ja) * | 2008-05-12 | 2009-11-26 | Nec Electronics Corp | 半導体装置及びその製造方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7049170B2 (en) * | 2003-12-17 | 2006-05-23 | Tru-Si Technologies, Inc. | Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities |
JP5222459B2 (ja) * | 2005-10-18 | 2013-06-26 | 新光電気工業株式会社 | 半導体チップの製造方法、マルチチップパッケージ |
US8154134B2 (en) | 2008-05-12 | 2012-04-10 | Texas Instruments Incorporated | Packaged electronic devices with face-up die having TSV connection to leads and die pad |
US7833895B2 (en) | 2008-05-12 | 2010-11-16 | Texas Instruments Incorporated | TSVS having chemically exposed TSV tips for integrated circuit devices |
KR101553560B1 (ko) * | 2008-11-26 | 2015-09-16 | 삼성전자주식회사 | 적층 패키지 및 이의 제조 방법 |
US8183673B2 (en) * | 2008-10-21 | 2012-05-22 | Samsung Electronics Co., Ltd. | Through-silicon via structures providing reduced solder spreading and methods of fabricating the same |
US8097953B2 (en) * | 2008-10-28 | 2012-01-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Three-dimensional integrated circuit stacking-joint interface structure |
-
2010
- 2010-09-13 US US12/880,629 patent/US8039385B1/en active Active
-
2011
- 2011-09-13 JP JP2013529269A patent/JP6073790B2/ja active Active
- 2011-09-13 CN CN201180043062.5A patent/CN103109362B/zh active Active
- 2011-09-13 WO PCT/US2011/051419 patent/WO2012037140A2/en active Application Filing
- 2011-09-14 US US13/232,682 patent/US8299612B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004165295A (ja) * | 2002-11-11 | 2004-06-10 | Murata Mfg Co Ltd | セラミック多層基板およびその製造方法 |
JP2005286184A (ja) * | 2004-03-30 | 2005-10-13 | Nec Electronics Corp | 貫通電極、それを用いたスペーサー、およびそれらの製造方法 |
JP2009277719A (ja) * | 2008-05-12 | 2009-11-26 | Nec Electronics Corp | 半導体装置及びその製造方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016525274A (ja) * | 2013-08-06 | 2016-08-22 | クアルコム,インコーポレイテッド | ダイ上の積層再分配層 |
KR20180043382A (ko) * | 2015-09-14 | 2018-04-27 | 마이크론 테크놀로지, 인크 | 언더-범프 금속 구조체용 칼라 및 관련 시스템 및 방법 |
KR102124136B1 (ko) * | 2015-09-14 | 2020-06-18 | 마이크론 테크놀로지, 인크 | 언더-범프 금속 구조체용 칼라 및 관련 시스템 및 방법 |
US10886244B2 (en) | 2015-09-14 | 2021-01-05 | Micron Technology, Inc. | Collars for under-bump metal structures and associated systems and methods |
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