JP2013522874A - カスタマイズ層を有する配線基板 - Google Patents
カスタマイズ層を有する配線基板 Download PDFInfo
- Publication number
- JP2013522874A JP2013522874A JP2012557087A JP2012557087A JP2013522874A JP 2013522874 A JP2013522874 A JP 2013522874A JP 2012557087 A JP2012557087 A JP 2012557087A JP 2012557087 A JP2012557087 A JP 2012557087A JP 2013522874 A JP2013522874 A JP 2013522874A
- Authority
- JP
- Japan
- Prior art keywords
- trace
- layer
- insulating material
- wiring board
- traces
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/049—Wire bonding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1241—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
- H05K3/4015—Surface contacts, e.g. bumps using auxiliary conductive elements, e.g. pieces of metal foil, metallic spheres
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
【選択図】 図10
Description
Claims (14)
- ベース基板と、
前記ベース基板の表面上に配置された複数のカスタマイズ層と、
を含み、
前記カスタマイズ層は、
第1電気絶縁材料層と、
前記第1絶縁材料層の表面上に配置された第1導電性トレース層であって、第1トレース、第2トレース及び第3トレースを含み、前記第3トレースの一部が前記第1トレース及び前記第2トレースの端部間の空間に配置される、第1導電性トレース層と、
前記第3トレースの前記一部上及び前記第1トレース及び前記第2トレースの前記端部間の前記空間内に配置された乾燥プリント可能電気絶縁材料を含む電気絶縁物質と、
前記第1トレース及び前記第2トレースの前記端部、及び、前記絶縁物質上に配置された乾燥プリント可能導電材料を含む導電物質を含む導電性ジャンパであって、前記第1トレース及び前記第2トレースを、前記第3トレースに電気的に接触することなく、電気的に接続する、導電性ジャンパと、
を含む、多層配線基板。 - 前記絶縁物質は、乾燥電気絶縁性インクを含む、請求項1に記載の多層配線基板。
- 前記導電物質は、乾燥導電性インクを含む、請求項2に記載の多層配線基板。
- 前記導電性物質は、乾燥導電性インクを含む、請求項1に記載の多層配線基板。
- 前記カスタマイズ層は、前記ベース基板の前記表面上に配置された第2導電性トレース層をさらに含み、前記第1電気絶縁材料層は、前記ベースの前記表面及び前記第2トレース層上に配置され、
前記多層配線基板は、前記第1絶縁材料層内に埋め込まれた複数の導電性第1ビアをさらに含み、前記第1ビアの各々は、前記第1トレース層における前記トレースのうちの1つを、前記第2トレース層における前記トレースのうちの1つに電気的に接続する、請求項1に記載の多層配線基板。 - 前記第1トレース層、前記ジャンパ、及び前記第1絶縁材料層の前記表面上に配置される第2電気絶縁材料層をさらに含む、請求項5に記載の多層配線基板。
- ベース基板と、
前記ベース基板の表面上に配置された第1導電性トレース層と、
前記第1トレース層上に配置されかつ前記ベース基板の前記表面に結合された第1電気絶縁材料剛性層と、
前記第1絶縁材料層内に埋め込まれた導電性の第1ビアであって、前記第1ビアの各々は、前記1トレース層の前記トレースのうちの1つに接合され、前記第1絶縁材料層の外面まで延在するワイヤスタッドのスタック又はワイヤを含む、多層配線基板。 - 前記第1絶縁材料層は、硬化エポキシを含む、請求項7に記載の多層配線基板。
- 前記第1ビアは、第1トレース層の前記トレースのうちの1つに接合されたワイヤを含む、請求項7に記載の多層配線基板。
- 前記ワイヤの各々の本体部は、前記第1トレース層の前記トレースのうちの1つから、前記ベース基板の前記表面に対し実質的に垂直に延在する、請求項9に記載の多層配線基板。
- 前記ワイヤの各々の本体部は、前記第1トレース層の前記トレースのうちの1つから、前記ベース基板の前記表面に対して15から75度の角度で延在する、請求項9に記載の多層配線基板。
- 前記第1絶縁材料層の前記外面上の第2導電性トレース層をさらに含み、前記第2トレース層の前記トレースの各々は、前記第1ビアのうちの1つに電気的に接続される、請求項11に記載の多層配線基板。
- 前記第2トレース層及び前記第1絶縁材料層の前記外面上に配置された第2電気絶縁材料層と、
前記第2絶縁材料層内に埋め込まれた導電性の第2ビアと、
をさらに含み、
前記第2ビアの各々は、前記第2トレース層の前記トレースのうちの1つに接合されかつ前記第2絶縁材料層の外面まで延在するワイヤスタッドのスタック又はワイヤを含む、請求項12に記載の多層配線基板。 - 前記第2絶縁材料層の外面上の第3導電性トレース層をさらに含み、前記第3トレース層の前記トレースは、前記第2ビアに電気的に接続される、請求項13に記載の多層配線基板。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/719,136 US8476538B2 (en) | 2010-03-08 | 2010-03-08 | Wiring substrate with customization layers |
US12/719,136 | 2010-03-08 | ||
PCT/US2011/026960 WO2011112409A2 (en) | 2010-03-08 | 2011-03-03 | Wiring substrate with customization layers |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2013522874A true JP2013522874A (ja) | 2013-06-13 |
JP2013522874A5 JP2013522874A5 (ja) | 2014-04-17 |
JP6087630B2 JP6087630B2 (ja) | 2017-03-01 |
Family
ID=44530323
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012557087A Expired - Fee Related JP6087630B2 (ja) | 2010-03-08 | 2011-03-03 | カスタマイズ層を有する配線基板 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8476538B2 (ja) |
JP (1) | JP6087630B2 (ja) |
KR (1) | KR101851269B1 (ja) |
TW (1) | TWI533775B (ja) |
WO (1) | WO2011112409A2 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9484973B1 (en) * | 2010-08-09 | 2016-11-01 | Qorvo Us, Inc. | Voltage equalization for stacked FETs in RF switches |
TW201228507A (en) * | 2010-12-17 | 2012-07-01 | Hon Hai Prec Ind Co Ltd | Printed circuit board |
TW201347124A (zh) * | 2012-05-07 | 2013-11-16 | 矽品精密工業股份有限公司 | 半導體封裝件及其製法 |
JP2014216123A (ja) * | 2013-04-24 | 2014-11-17 | タイコエレクトロニクスジャパン合同会社 | 電気コネクタ組立体及びその実装構造 |
US9431759B2 (en) | 2014-10-20 | 2016-08-30 | HGST Netherlands B.V. | Feedthrough connector for hermetically sealed electronic devices |
US10650181B2 (en) * | 2017-09-21 | 2020-05-12 | Nokia Solutions And Networks Oy | Spatial location of vias in a printed circuit board |
WO2019146699A1 (ja) * | 2018-01-24 | 2019-08-01 | 京セラ株式会社 | 配線基板、電子装置及び電子モジュール |
US10790307B2 (en) | 2018-11-27 | 2020-09-29 | Qorvo Us, Inc. | Switch branch structure |
WO2021178238A1 (en) * | 2020-03-02 | 2021-09-10 | Kuprion Inc. | Ceramic-based circuit board assemblies formed using metal nanoparticles |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11112145A (ja) * | 1997-10-07 | 1999-04-23 | Ngk Spark Plug Co Ltd | 配線基板及びその製造方法 |
JPH11317383A (ja) * | 1998-05-06 | 1999-11-16 | Dexter Kk | 樹脂で封止した半導体チップの分断方法 |
JP2003152133A (ja) * | 2001-11-12 | 2003-05-23 | Toppan Printing Co Ltd | 半導体パッケージ用基板及びその製造方法 |
JP2005327986A (ja) * | 2004-05-17 | 2005-11-24 | Seiko Epson Corp | クロスオーバ配線構造およびその電子回路装置 |
JP2005332887A (ja) * | 2004-05-18 | 2005-12-02 | Shinko Electric Ind Co Ltd | 多層配線の形成方法および多層配線基板の製造方法 |
JP2006013223A (ja) * | 2004-06-28 | 2006-01-12 | Seiko Epson Corp | 配線構造 |
Family Cites Families (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4771537A (en) * | 1985-12-20 | 1988-09-20 | Olin Corporation | Method of joining metallic components |
US5229549A (en) * | 1989-11-13 | 1993-07-20 | Sumitomo Electric Industries, Ltd. | Ceramic circuit board and a method of manufacturing the ceramic circuit board |
US5310965A (en) * | 1991-08-28 | 1994-05-10 | Nec Corporation | Multi-level wiring structure having an organic interlayer insulating film |
US6295729B1 (en) * | 1992-10-19 | 2001-10-02 | International Business Machines Corporation | Angled flying lead wire bonding process |
US5371654A (en) * | 1992-10-19 | 1994-12-06 | International Business Machines Corporation | Three dimensional high performance interconnection package |
US6064213A (en) * | 1993-11-16 | 2000-05-16 | Formfactor, Inc. | Wafer-level burn-in and test |
US7282945B1 (en) * | 1996-09-13 | 2007-10-16 | International Business Machines Corporation | Wafer scale high density probe assembly, apparatus for use thereof and methods of fabrication thereof |
US5828226A (en) * | 1996-11-06 | 1998-10-27 | Cerprobe Corporation | Probe card assembly for high density integrated circuits |
JP3188876B2 (ja) * | 1997-12-29 | 2001-07-16 | インターナショナル・ビジネス・マシーンズ・コーポレ−ション | プロダクト・チップをテストする方法、テスト・ヘッド及びテスト装置 |
US6372999B1 (en) * | 1999-04-20 | 2002-04-16 | Trw Inc. | Multilayer wiring board and multilayer wiring package |
JP3865115B2 (ja) * | 1999-09-13 | 2007-01-10 | Hoya株式会社 | 多層配線基板及びその製造方法、並びに該多層配線基板を有するウエハ一括コンタクトボード |
US6309912B1 (en) * | 2000-06-20 | 2001-10-30 | Motorola, Inc. | Method of interconnecting an embedded integrated circuit |
US7480988B2 (en) * | 2001-03-30 | 2009-01-27 | Second Sight Medical Products, Inc. | Method and apparatus for providing hermetic electrical feedthrough |
US6729019B2 (en) * | 2001-07-11 | 2004-05-04 | Formfactor, Inc. | Method of manufacturing a probe card |
US6821625B2 (en) * | 2001-09-27 | 2004-11-23 | International Business Machines Corporation | Thermal spreader using thermal conduits |
US6857880B2 (en) * | 2001-11-09 | 2005-02-22 | Tomonari Ohtsuki | Electrical connector |
US6831371B1 (en) * | 2002-03-16 | 2004-12-14 | Amkor Technology, Inc. | Integrated circuit substrate having embedded wire conductors and method therefor |
JP3925283B2 (ja) * | 2002-04-16 | 2007-06-06 | セイコーエプソン株式会社 | 電子デバイスの製造方法、電子機器の製造方法 |
US6739879B2 (en) * | 2002-07-03 | 2004-05-25 | Intel Corporation | Ball grid array circuit board jumper |
US7047638B2 (en) * | 2002-07-24 | 2006-05-23 | Formfactor, Inc | Method of making microelectronic spring contact array |
US6920689B2 (en) * | 2002-12-06 | 2005-07-26 | Formfactor, Inc. | Method for making a socket to perform testing on integrated circuits |
US7682970B2 (en) * | 2003-07-16 | 2010-03-23 | The Regents Of The University Of California | Maskless nanofabrication of electronic components |
US20050108875A1 (en) * | 2003-11-26 | 2005-05-26 | Mathieu Gaetan L. | Methods for making vertical electric feed through structures usable to form removable substrate tiles in a wafer test system |
US7024763B2 (en) * | 2003-11-26 | 2006-04-11 | Formfactor, Inc. | Methods for making plated through holes usable as interconnection wire or probe attachments |
US7375978B2 (en) * | 2003-12-23 | 2008-05-20 | Intel Corporation | Method and apparatus for trace shielding and routing on a substrate |
KR20050065038A (ko) * | 2003-12-24 | 2005-06-29 | 삼성전기주식회사 | 비수직 비아가 구비된 인쇄회로기판 및 패키지 |
KR100663942B1 (ko) * | 2005-03-24 | 2007-01-02 | 삼성전기주식회사 | 적층 세라믹 콘덴서 및 그 제조 방법 |
KR100596602B1 (ko) * | 2005-03-30 | 2006-07-04 | 삼성전기주식회사 | 적층 세라믹 콘덴서 및 그 제조 방법 |
TWM274641U (en) * | 2005-04-01 | 2005-09-01 | Lingsen Precision Ind Ltd | Packaging carrier for integrated circuit |
JP2007059184A (ja) * | 2005-08-24 | 2007-03-08 | Citizen Electronics Co Ltd | キーシートモジュール |
US20070152685A1 (en) * | 2006-01-03 | 2007-07-05 | Formfactor, Inc. | A probe array structure and a method of making a probe array structure |
US7532391B2 (en) * | 2006-01-20 | 2009-05-12 | Sumitomo Electric Industries, Ltd. | Optical amplification module and laser light source designed to suppress photodarkening |
JP4950500B2 (ja) * | 2006-02-06 | 2012-06-13 | キヤノン株式会社 | プリント配線基板の接合構造 |
US7520757B2 (en) | 2006-08-11 | 2009-04-21 | Tyco Electronics Corporation | Circuit board having configurable ground link and with coplanar circuit and ground traces |
US7836587B2 (en) * | 2006-09-21 | 2010-11-23 | Formfactor, Inc. | Method of repairing a contactor apparatus |
US8120927B2 (en) | 2008-04-07 | 2012-02-21 | Mediatek Inc. | Printed circuit board |
KR101243837B1 (ko) * | 2009-10-23 | 2013-03-20 | 한국전자통신연구원 | 다층 배선 연결 구조 및 그의 제조 방법 |
-
2010
- 2010-03-08 US US12/719,136 patent/US8476538B2/en not_active Expired - Fee Related
-
2011
- 2011-03-03 KR KR1020127026260A patent/KR101851269B1/ko active IP Right Grant
- 2011-03-03 JP JP2012557087A patent/JP6087630B2/ja not_active Expired - Fee Related
- 2011-03-03 WO PCT/US2011/026960 patent/WO2011112409A2/en active Application Filing
- 2011-03-07 TW TW100107534A patent/TWI533775B/zh not_active IP Right Cessation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11112145A (ja) * | 1997-10-07 | 1999-04-23 | Ngk Spark Plug Co Ltd | 配線基板及びその製造方法 |
JPH11317383A (ja) * | 1998-05-06 | 1999-11-16 | Dexter Kk | 樹脂で封止した半導体チップの分断方法 |
JP2003152133A (ja) * | 2001-11-12 | 2003-05-23 | Toppan Printing Co Ltd | 半導体パッケージ用基板及びその製造方法 |
JP2005327986A (ja) * | 2004-05-17 | 2005-11-24 | Seiko Epson Corp | クロスオーバ配線構造およびその電子回路装置 |
JP2005332887A (ja) * | 2004-05-18 | 2005-12-02 | Shinko Electric Ind Co Ltd | 多層配線の形成方法および多層配線基板の製造方法 |
JP2006013223A (ja) * | 2004-06-28 | 2006-01-12 | Seiko Epson Corp | 配線構造 |
Also Published As
Publication number | Publication date |
---|---|
US20110214910A1 (en) | 2011-09-08 |
WO2011112409A2 (en) | 2011-09-15 |
KR20130037203A (ko) | 2013-04-15 |
WO2011112409A3 (en) | 2012-01-19 |
TWI533775B (zh) | 2016-05-11 |
KR101851269B1 (ko) | 2018-04-23 |
JP6087630B2 (ja) | 2017-03-01 |
TW201206285A (en) | 2012-02-01 |
US8476538B2 (en) | 2013-07-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6087630B2 (ja) | カスタマイズ層を有する配線基板 | |
US8130005B2 (en) | Electrical guard structures for protecting a signal trace from electrical interference | |
US8272124B2 (en) | Anchoring carbon nanotube columns | |
JP4171513B2 (ja) | コンタクタ、該コンタクタを備えたコンタクトストラクチャ、プローブカード、及び、試験装置 | |
US7579856B2 (en) | Probe structures with physically suspended electronic components | |
JP5651608B2 (ja) | インピーダンス制御されたワイヤ・ボンド及び導電性基準部品を有するマイクロ電子アセンブリ | |
KR101923760B1 (ko) | 정전기 방전 보호를 위한 수직 절환 포메이션 | |
US7049840B1 (en) | Hybrid interconnect and system for testing semiconductor dice | |
WO2011002712A1 (en) | Singulated semiconductor device separable electrical interconnect | |
JP2013238578A (ja) | プローブカード用空間変換器及びその製造方法 | |
JP2015135971A (ja) | インピーダンス制御ワイヤーボンド及び基準ワイヤーボンドを有するマイクロ電子アセンブリ | |
TWI271525B (en) | Probe head with vertical probes, method for manufacturing the probe head, and probe card using the probe head | |
JP4343256B1 (ja) | 半導体装置の製造方法 | |
US20090051378A1 (en) | Air Bridge Structures And Methods Of Making And Using Air Bridge Structures | |
WO2009147804A1 (ja) | プローブ装置製造方法 | |
US8476630B2 (en) | Methods of adding pads and one or more interconnect layers to the passivated topside of a wafer including connections to at least a portion of the integrated circuit pads thereon | |
JP5774332B2 (ja) | プローブカード用セラミック基板及びその製造方法 | |
JP4960854B2 (ja) | 電子部品検査装置用配線基板 | |
CN105655321A (zh) | 电子封装及其制作和使用方法 | |
JP2004317162A (ja) | プローブカード、プローブピン及びその製造方法 | |
KR100915326B1 (ko) | 전기 검사 장치의 제조 방법 | |
KR101327377B1 (ko) | 연성 인쇄회로기판을 이용한 프로브 카드 조립체 | |
TWI241669B (en) | Planarizing and testing of BGA packages | |
JP5475657B2 (ja) | プローブ装置製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140228 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20140228 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20140820 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140825 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20141117 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20141125 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20141210 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20141217 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150126 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20150526 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150917 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20151001 |
|
A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20151023 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20160715 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20161025 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20170202 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6087630 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
LAPS | Cancellation because of no payment of annual fees |