JP2013518433A - Icデバイスのエンハンストされた熱放散のための突出するtsv - Google Patents
Icデバイスのエンハンストされた熱放散のための突出するtsv Download PDFInfo
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- JP2013518433A JP2013518433A JP2012551157A JP2012551157A JP2013518433A JP 2013518433 A JP2013518433 A JP 2013518433A JP 2012551157 A JP2012551157 A JP 2012551157A JP 2012551157 A JP2012551157 A JP 2012551157A JP 2013518433 A JP2013518433 A JP 2013518433A
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US29982610P | 2010-01-29 | 2010-01-29 | |
| US61/299,826 | 2010-01-29 | ||
| US12/888,135 US8294261B2 (en) | 2010-01-29 | 2010-09-22 | Protruding TSV tips for enhanced heat dissipation for IC devices |
| US12/888,135 | 2010-09-22 | ||
| PCT/US2010/061033 WO2011093956A2 (en) | 2010-01-29 | 2010-12-17 | Protruding tsv tips for enhanced heat dissipation for ic devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2013518433A true JP2013518433A (ja) | 2013-05-20 |
| JP2013518433A5 JP2013518433A5 (enExample) | 2014-02-06 |
Family
ID=44320033
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012551157A Pending JP2013518433A (ja) | 2010-01-29 | 2010-12-17 | Icデバイスのエンハンストされた熱放散のための突出するtsv |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8294261B2 (enExample) |
| JP (1) | JP2013518433A (enExample) |
| CN (1) | CN102870203B (enExample) |
| WO (1) | WO2011093956A2 (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011192712A (ja) * | 2010-03-12 | 2011-09-29 | Renesas Electronics Corp | 半導体装置の製造方法 |
| US10593606B2 (en) | 2015-05-25 | 2020-03-17 | Sony Corporation | Wiring board, and manufacturing method |
Families Citing this family (79)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7825517B2 (en) * | 2007-07-16 | 2010-11-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for packaging semiconductor dies having through-silicon vias |
| GB2462589B (en) * | 2008-08-04 | 2013-02-20 | Sony Comp Entertainment Europe | Apparatus and method of viewing electronic documents |
| US7928534B2 (en) | 2008-10-09 | 2011-04-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bond pad connection to redistribution lines having tapered profiles |
| US8513119B2 (en) | 2008-12-10 | 2013-08-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming bump structure having tapered sidewalls for stacked dies |
| US8736050B2 (en) * | 2009-09-03 | 2014-05-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Front side copper post joint structure for temporary bond in TSV application |
| US8097964B2 (en) * | 2008-12-29 | 2012-01-17 | Texas Instruments Incorporated | IC having TSV arrays with reduced TSV induced stress |
| US20100171197A1 (en) | 2009-01-05 | 2010-07-08 | Hung-Pin Chang | Isolation Structure for Stacked Dies |
| US8759949B2 (en) * | 2009-04-30 | 2014-06-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer backside structures having copper pillars |
| US8158489B2 (en) * | 2009-06-26 | 2012-04-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Formation of TSV backside interconnects by modifying carrier wafers |
| US8791549B2 (en) * | 2009-09-22 | 2014-07-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer backside interconnect structure connected to TSVs |
| JP2011082450A (ja) * | 2009-10-09 | 2011-04-21 | Elpida Memory Inc | 半導体装置及びこれを備える情報処理システム |
| US8659155B2 (en) * | 2009-11-05 | 2014-02-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for forming copper pillar bumps |
| US8466059B2 (en) | 2010-03-30 | 2013-06-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-layer interconnect structure for stacked dies |
| US8174124B2 (en) * | 2010-04-08 | 2012-05-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Dummy pattern in wafer backside routing |
| US8441124B2 (en) | 2010-04-29 | 2013-05-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Cu pillar bump with non-metal sidewall protection structure |
| US8546254B2 (en) | 2010-08-19 | 2013-10-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for forming copper pillar bumps using patterned anodes |
| US10923204B2 (en) | 2010-08-20 | 2021-02-16 | Attopsemi Technology Co., Ltd | Fully testible OTP memory |
| US10249379B2 (en) * | 2010-08-20 | 2019-04-02 | Attopsemi Technology Co., Ltd | One-time programmable devices having program selector for electrical fuses with extended area |
| US10229746B2 (en) | 2010-08-20 | 2019-03-12 | Attopsemi Technology Co., Ltd | OTP memory with high data security |
| US10916317B2 (en) | 2010-08-20 | 2021-02-09 | Attopsemi Technology Co., Ltd | Programmable resistance memory on thin film transistor technology |
| US9818478B2 (en) | 2012-12-07 | 2017-11-14 | Attopsemi Technology Co., Ltd | Programmable resistive device and memory using diode as selector |
| US9285168B2 (en) | 2010-10-05 | 2016-03-15 | Applied Materials, Inc. | Module for ozone cure and post-cure moisture treatment |
| US8664127B2 (en) | 2010-10-15 | 2014-03-04 | Applied Materials, Inc. | Two silicon-containing precursors for gapfill enhancing dielectric liner |
| US8836116B2 (en) * | 2010-10-21 | 2014-09-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer level packaging of micro-electro-mechanical systems (MEMS) and complementary metal-oxide-semiconductor (CMOS) substrates |
| TWI445155B (zh) * | 2011-01-06 | 2014-07-11 | 日月光半導體製造股份有限公司 | 堆疊式封裝結構及其製造方法 |
| US8742564B2 (en) * | 2011-01-17 | 2014-06-03 | Bai-Yao Lou | Chip package and method for forming the same |
| US20120180954A1 (en) | 2011-01-18 | 2012-07-19 | Applied Materials, Inc. | Semiconductor processing system and methods using capacitively coupled plasma |
| US10283321B2 (en) | 2011-01-18 | 2019-05-07 | Applied Materials, Inc. | Semiconductor processing system and methods using capacitively coupled plasma |
| US10586832B2 (en) | 2011-02-14 | 2020-03-10 | Attopsemi Technology Co., Ltd | One-time programmable devices using gate-all-around structures |
| US10192615B2 (en) | 2011-02-14 | 2019-01-29 | Attopsemi Technology Co., Ltd | One-time programmable devices having a semiconductor fin structure with a divided active region |
| US8716154B2 (en) | 2011-03-04 | 2014-05-06 | Applied Materials, Inc. | Reduced pattern loading using silicon oxide multi-layers |
| US8900994B2 (en) | 2011-06-09 | 2014-12-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for producing a protective structure |
| US9404178B2 (en) | 2011-07-15 | 2016-08-02 | Applied Materials, Inc. | Surface treatment and deposition for reduced outgassing |
| US8604619B2 (en) * | 2011-08-31 | 2013-12-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Through silicon via keep out zone formation along different crystal orientations |
| US8617989B2 (en) * | 2011-09-26 | 2013-12-31 | Applied Materials, Inc. | Liner property improvement |
| US20130082383A1 (en) * | 2011-10-03 | 2013-04-04 | Texas Instruments Incorporated | Electronic assembly having mixed interface including tsv die |
| JP5696647B2 (ja) * | 2011-11-18 | 2015-04-08 | 富士通株式会社 | 半導体装置およびその製造方法 |
| DE112011106068B4 (de) | 2011-12-28 | 2023-11-16 | Exo Imaging, Inc. | MEMS auf Rückseite von Bulk-Silizium |
| US8664768B2 (en) | 2012-05-03 | 2014-03-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interposer having a defined through via pattern |
| CN103633039B (zh) * | 2012-08-29 | 2017-02-08 | 中芯国际集成电路制造(上海)有限公司 | 半导体散热结构及其形成方法、半导体芯片 |
| US20140061855A1 (en) * | 2012-09-06 | 2014-03-06 | United Microelectronics Corporation | Capacitor structure and fabricating method thereof |
| US8889566B2 (en) | 2012-09-11 | 2014-11-18 | Applied Materials, Inc. | Low cost flowable dielectric films |
| KR102021884B1 (ko) * | 2012-09-25 | 2019-09-18 | 삼성전자주식회사 | 후면 본딩 구조체를 갖는 반도체 소자 |
| KR101959715B1 (ko) | 2012-11-06 | 2019-03-20 | 삼성전자 주식회사 | 반도체 장치 |
| US9204542B1 (en) * | 2013-01-07 | 2015-12-01 | Xilinx, Inc. | Multi-use package substrate |
| US9018108B2 (en) | 2013-01-25 | 2015-04-28 | Applied Materials, Inc. | Low shrinkage dielectric films |
| TWI503934B (zh) * | 2013-05-09 | 2015-10-11 | 日月光半導體製造股份有限公司 | 半導體元件及其製造方法及半導體封裝結構 |
| RU2546710C2 (ru) * | 2013-07-30 | 2015-04-10 | Акционерное общество "Научно-исследовательский институт молекулярной электроники" (АО "НИИМЭ") | Способ изготовления кристаллов с теплоотводящими элементами для вертикальной трехмерной (through-silicon vias ) сборки многокристальных сверхбольших интегральных схем |
| US9041193B2 (en) | 2013-09-17 | 2015-05-26 | Hamilton Sundstrand Corporation | Semiconductor substrate including a cooling channel and method of forming a semiconductor substrate including a cooling channel |
| US9324628B2 (en) | 2014-02-25 | 2016-04-26 | International Business Machines Corporation | Integrated circuit heat dissipation using nanostructures |
| US9412581B2 (en) | 2014-07-16 | 2016-08-09 | Applied Materials, Inc. | Low-K dielectric gapfill by flowable deposition |
| US9184112B1 (en) | 2014-12-17 | 2015-11-10 | International Business Machines Corporation | Cooling apparatus for an integrated circuit |
| US9472483B2 (en) | 2014-12-17 | 2016-10-18 | International Business Machines Corporation | Integrated circuit cooling apparatus |
| KR102316267B1 (ko) | 2015-04-15 | 2021-10-22 | 삼성전자주식회사 | 씨오피 구조를 갖는 메모리 장치, 이를 포함하는 메모리 패키지 및 그 제조 방법 |
| US9728494B2 (en) | 2015-09-24 | 2017-08-08 | Verily Life Sciences Llc | Body-mountable device with a common substrate for electronics and battery |
| US10319694B2 (en) | 2016-08-10 | 2019-06-11 | Qualcomm Incorporated | Semiconductor assembly and method of making same |
| US11527454B2 (en) * | 2016-11-14 | 2022-12-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structures and methods of forming the same |
| US11062786B2 (en) | 2017-04-14 | 2021-07-13 | Attopsemi Technology Co., Ltd | One-time programmable memories with low power read operation and novel sensing scheme |
| US10535413B2 (en) | 2017-04-14 | 2020-01-14 | Attopsemi Technology Co., Ltd | Low power read operation for programmable resistive memories |
| US10726914B2 (en) | 2017-04-14 | 2020-07-28 | Attopsemi Technology Co. Ltd | Programmable resistive memories with low power read operation and novel sensing scheme |
| US11615859B2 (en) | 2017-04-14 | 2023-03-28 | Attopsemi Technology Co., Ltd | One-time programmable memories with ultra-low power read operation and novel sensing scheme |
| US10256203B2 (en) * | 2017-07-27 | 2019-04-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and semiconductor package |
| US10770160B2 (en) | 2017-11-30 | 2020-09-08 | Attopsemi Technology Co., Ltd | Programmable resistive memory formed by bit slices from a standard cell library |
| CN108321131B (zh) * | 2018-01-16 | 2019-09-24 | 厦门科一半导体科技有限公司 | 具有高效散热结构的集成电路 |
| KR20190119475A (ko) * | 2018-04-12 | 2019-10-22 | 에스케이하이닉스 주식회사 | 반도체 다이들의 스택에서 조인트 불량을 검출하는 방법 |
| US11521923B2 (en) * | 2018-05-24 | 2022-12-06 | Intel Corporation | Integrated circuit package supports |
| CN110010575B (zh) * | 2018-12-25 | 2021-03-30 | 浙江集迈科微电子有限公司 | 一种栓塞互联式的tsv结构及其制作方法 |
| CN113035801A (zh) * | 2019-12-25 | 2021-06-25 | 台湾积体电路制造股份有限公司 | 存储器装置及其制造方法 |
| US11355410B2 (en) | 2020-04-28 | 2022-06-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Thermal dissipation in semiconductor devices |
| TWI741935B (zh) * | 2020-04-28 | 2021-10-01 | 台灣積體電路製造股份有限公司 | 半導體元件與其製作方法 |
| CN113964091A (zh) | 2020-07-20 | 2022-01-21 | 长鑫存储技术有限公司 | 半导体装置及其制备方法、三维集成电路 |
| WO2022126017A2 (en) * | 2020-12-11 | 2022-06-16 | Qorvo Us, Inc. | 3d packaging with silicon die as thermal sink for high- power low thermal conductivity dies |
| TWI755281B (zh) * | 2021-02-18 | 2022-02-11 | 創意電子股份有限公司 | 散熱結構、半導體封裝裝置及半導體封裝裝置之製造方法 |
| US11791326B2 (en) * | 2021-05-10 | 2023-10-17 | International Business Machines Corporation | Memory and logic chip stack with a translator chip |
| US12483429B2 (en) | 2021-06-01 | 2025-11-25 | Attopsemi Technology Co., Ltd | Physically unclonable function produced using OTP memory |
| US20230260896A1 (en) * | 2022-02-17 | 2023-08-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated circuit package and method |
| US11846804B2 (en) * | 2022-02-24 | 2023-12-19 | Globalfoundries U.S. Inc. | Thermally-conductive features positioned adjacent to an optical component |
| US12272613B2 (en) * | 2022-07-11 | 2025-04-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Thermal structure for semiconductor device and method of forming the same |
| FR3152106B1 (fr) * | 2023-08-11 | 2025-07-11 | 3D Plus | Module électronique comprenant un dispositif de dissipation thermique modulable. |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11154679A (ja) * | 1997-11-20 | 1999-06-08 | Hitachi Ltd | 半導体装置 |
| JP2008103387A (ja) * | 2006-10-17 | 2008-05-01 | Murata Mfg Co Ltd | 半導体装置 |
| JP2009206496A (ja) * | 2008-01-30 | 2009-09-10 | Panasonic Corp | 半導体チップ及び半導体装置 |
| JP2009231371A (ja) * | 2008-03-19 | 2009-10-08 | Toshiba Corp | 半導体チップ及び半導体装置 |
| JP2009238957A (ja) * | 2008-03-26 | 2009-10-15 | Panasonic Electric Works Co Ltd | 基板へのビアの形成方法 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4069498A (en) * | 1976-11-03 | 1978-01-17 | International Business Machines Corporation | Studded heat exchanger for integrated circuit package |
| US20040152240A1 (en) * | 2003-01-24 | 2004-08-05 | Carlos Dangelo | Method and apparatus for the use of self-assembled nanowires for the removal of heat from integrated circuits |
| US20090008792A1 (en) * | 2004-11-19 | 2009-01-08 | Industrial Technology Research Institute | Three-dimensional chip-stack package and active component on a substrate |
| US7723759B2 (en) * | 2005-10-24 | 2010-05-25 | Intel Corporation | Stacked wafer or die packaging with enhanced thermal and device performance |
| US7576434B2 (en) * | 2007-06-26 | 2009-08-18 | Intel Corporation | Wafer-level solder bumps |
| US20090115026A1 (en) * | 2007-11-05 | 2009-05-07 | Texas Instruments Incorporated | Semiconductor device having through-silicon vias for high current,high frequency, and heat dissipation |
| US8154134B2 (en) * | 2008-05-12 | 2012-04-10 | Texas Instruments Incorporated | Packaged electronic devices with face-up die having TSV connection to leads and die pad |
| US7851346B2 (en) * | 2008-07-21 | 2010-12-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding metallurgy for three-dimensional interconnect |
| US8097964B2 (en) * | 2008-12-29 | 2012-01-17 | Texas Instruments Incorporated | IC having TSV arrays with reduced TSV induced stress |
| US7838988B1 (en) * | 2009-05-28 | 2010-11-23 | Texas Instruments Incorporated | Stud bumps as local heat sinks during transient power operations |
-
2010
- 2010-09-22 US US12/888,135 patent/US8294261B2/en active Active
- 2010-12-17 CN CN201080065821.3A patent/CN102870203B/zh active Active
- 2010-12-17 WO PCT/US2010/061033 patent/WO2011093956A2/en not_active Ceased
- 2010-12-17 JP JP2012551157A patent/JP2013518433A/ja active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11154679A (ja) * | 1997-11-20 | 1999-06-08 | Hitachi Ltd | 半導体装置 |
| JP2008103387A (ja) * | 2006-10-17 | 2008-05-01 | Murata Mfg Co Ltd | 半導体装置 |
| JP2009206496A (ja) * | 2008-01-30 | 2009-09-10 | Panasonic Corp | 半導体チップ及び半導体装置 |
| JP2009231371A (ja) * | 2008-03-19 | 2009-10-08 | Toshiba Corp | 半導体チップ及び半導体装置 |
| JP2009238957A (ja) * | 2008-03-26 | 2009-10-15 | Panasonic Electric Works Co Ltd | 基板へのビアの形成方法 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011192712A (ja) * | 2010-03-12 | 2011-09-29 | Renesas Electronics Corp | 半導体装置の製造方法 |
| US10593606B2 (en) | 2015-05-25 | 2020-03-17 | Sony Corporation | Wiring board, and manufacturing method |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2011093956A3 (en) | 2011-10-13 |
| CN102870203B (zh) | 2016-08-24 |
| CN102870203A (zh) | 2013-01-09 |
| US20110186990A1 (en) | 2011-08-04 |
| US8294261B2 (en) | 2012-10-23 |
| WO2011093956A2 (en) | 2011-08-04 |
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