JP2013115621A - レベルシフター回路、集積回路装置、電子時計 - Google Patents

レベルシフター回路、集積回路装置、電子時計 Download PDF

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Publication number
JP2013115621A
JP2013115621A JP2011260253A JP2011260253A JP2013115621A JP 2013115621 A JP2013115621 A JP 2013115621A JP 2011260253 A JP2011260253 A JP 2011260253A JP 2011260253 A JP2011260253 A JP 2011260253A JP 2013115621 A JP2013115621 A JP 2013115621A
Authority
JP
Japan
Prior art keywords
potential
signal
circuit
level shifter
shifter circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2011260253A
Other languages
English (en)
Japanese (ja)
Other versions
JP2013115621A5 (https=
Inventor
Yutaka Yamazaki
豊 山▲崎▼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2011260253A priority Critical patent/JP2013115621A/ja
Priority to CN2012103444490A priority patent/CN103138740A/zh
Priority to US13/676,617 priority patent/US8829971B2/en
Publication of JP2013115621A publication Critical patent/JP2013115621A/ja
Publication of JP2013115621A5 publication Critical patent/JP2013115621A5/ja
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018514—Interface arrangements with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L5/00—Automatic control of voltage, current, or power

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
JP2011260253A 2011-11-29 2011-11-29 レベルシフター回路、集積回路装置、電子時計 Withdrawn JP2013115621A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2011260253A JP2013115621A (ja) 2011-11-29 2011-11-29 レベルシフター回路、集積回路装置、電子時計
CN2012103444490A CN103138740A (zh) 2011-11-29 2012-09-17 电平移位电路、集成电路装置、电子钟表
US13/676,617 US8829971B2 (en) 2011-11-29 2012-11-14 Level shifter circuit, integrated circuit device, electronic watch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011260253A JP2013115621A (ja) 2011-11-29 2011-11-29 レベルシフター回路、集積回路装置、電子時計

Publications (2)

Publication Number Publication Date
JP2013115621A true JP2013115621A (ja) 2013-06-10
JP2013115621A5 JP2013115621A5 (https=) 2014-12-04

Family

ID=48466278

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011260253A Withdrawn JP2013115621A (ja) 2011-11-29 2011-11-29 レベルシフター回路、集積回路装置、電子時計

Country Status (3)

Country Link
US (1) US8829971B2 (https=)
JP (1) JP2013115621A (https=)
CN (1) CN103138740A (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6386880B2 (ja) * 2014-11-05 2018-09-05 キヤノン株式会社 記録ヘッド基板、記録ヘッド及び記録装置
US10686438B2 (en) * 2017-08-29 2020-06-16 Taiwan Semiconductor Manufacturing Co., Ltd. Glitch preventing input/output circuits

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01196917A (ja) * 1988-02-01 1989-08-08 Seiko Epson Corp 半導体集積回路装置
JP2007180671A (ja) * 2005-12-27 2007-07-12 Toppan Printing Co Ltd レベルシフタ回路
JP2010532142A (ja) * 2007-06-26 2010-09-30 クゥアルコム・インコーポレイテッド 低いデューティサイクル歪みを有するレベルシフタ

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5238852A (en) * 1975-09-22 1977-03-25 Seiko Instr & Electronics Ltd Level shift circuit
JP3717781B2 (ja) * 2000-10-30 2005-11-16 株式会社ルネサステクノロジ レベル変換回路および半導体集積回路
JP3855835B2 (ja) * 2001-09-27 2006-12-13 ヤマハ株式会社 信号レベルシフト回路
JP3865689B2 (ja) * 2002-01-15 2007-01-10 松下電器産業株式会社 レベルシフト回路
JP4363998B2 (ja) * 2004-01-30 2009-11-11 凸版印刷株式会社 クロック変換装置及びクロック発生装置
CN1753309A (zh) * 2004-09-21 2006-03-29 株式会社瑞萨科技 变换信号的电压振幅的电平变换电路
CN1992525A (zh) * 2005-12-22 2007-07-04 松下电器产业株式会社 电平移动电路
JP4979955B2 (ja) 2006-02-02 2012-07-18 フリースケール セミコンダクター インコーポレイテッド レベルシフタ回路
JP2009171084A (ja) 2008-01-15 2009-07-30 Seiko Instruments Inc レベルシフタ回路
CN100594677C (zh) * 2008-05-21 2010-03-17 友达光电股份有限公司 电平移位电路
KR20100079331A (ko) * 2008-12-31 2010-07-08 주식회사 동부하이텍 레벨 시프트 회로

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01196917A (ja) * 1988-02-01 1989-08-08 Seiko Epson Corp 半導体集積回路装置
JP2007180671A (ja) * 2005-12-27 2007-07-12 Toppan Printing Co Ltd レベルシフタ回路
JP2010532142A (ja) * 2007-06-26 2010-09-30 クゥアルコム・インコーポレイテッド 低いデューティサイクル歪みを有するレベルシフタ

Also Published As

Publication number Publication date
US8829971B2 (en) 2014-09-09
CN103138740A (zh) 2013-06-05
US20130135027A1 (en) 2013-05-30

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