CN103138740A - 电平移位电路、集成电路装置、电子钟表 - Google Patents

电平移位电路、集成电路装置、电子钟表 Download PDF

Info

Publication number
CN103138740A
CN103138740A CN2012103444490A CN201210344449A CN103138740A CN 103138740 A CN103138740 A CN 103138740A CN 2012103444490 A CN2012103444490 A CN 2012103444490A CN 201210344449 A CN201210344449 A CN 201210344449A CN 103138740 A CN103138740 A CN 103138740A
Authority
CN
China
Prior art keywords
signal
potential
circuit
power supply
inverter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2012103444490A
Other languages
English (en)
Chinese (zh)
Inventor
山崎豊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of CN103138740A publication Critical patent/CN103138740A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018514—Interface arrangements with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L5/00—Automatic control of voltage, current, or power

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
CN2012103444490A 2011-11-29 2012-09-17 电平移位电路、集成电路装置、电子钟表 Pending CN103138740A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011-260253 2011-11-29
JP2011260253A JP2013115621A (ja) 2011-11-29 2011-11-29 レベルシフター回路、集積回路装置、電子時計

Publications (1)

Publication Number Publication Date
CN103138740A true CN103138740A (zh) 2013-06-05

Family

ID=48466278

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2012103444490A Pending CN103138740A (zh) 2011-11-29 2012-09-17 电平移位电路、集成电路装置、电子钟表

Country Status (3)

Country Link
US (1) US8829971B2 (https=)
JP (1) JP2013115621A (https=)
CN (1) CN103138740A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109428586A (zh) * 2017-08-29 2019-03-05 台湾积体电路制造股份有限公司 防止毛刺的输入/输出电路以及相关方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6386880B2 (ja) * 2014-11-05 2018-09-05 キヤノン株式会社 記録ヘッド基板、記録ヘッド及び記録装置

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030132778A1 (en) * 2002-01-15 2003-07-17 Matsushita Electric Industrial Co., Ltd. Level shift circuit
US6791392B2 (en) * 2001-09-27 2004-09-14 Yamaha Corporation Circuit for shifting an input signal level including compensation for supply voltage variation
US20040227558A1 (en) * 2000-10-30 2004-11-18 Renesas Technology Corp. Level shift circuit and semiconductor integrated circuit
JP2005217893A (ja) * 2004-01-30 2005-08-11 Toppan Printing Co Ltd クロック変換装置及びクロック発生装置並びに記録装置
CN1753309A (zh) * 2004-09-21 2006-03-29 株式会社瑞萨科技 变换信号的电压振幅的电平变换电路
CN1992525A (zh) * 2005-12-22 2007-07-04 松下电器产业株式会社 电平移动电路
CN101277108A (zh) * 2008-05-21 2008-10-01 友达光电股份有限公司 电平移位电路
CN101689849A (zh) * 2007-06-26 2010-03-31 高通股份有限公司 具有低占空比失真的电平转换器
CN101847989A (zh) * 2008-12-31 2010-09-29 东部高科股份有限公司 电平移位电路

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5238852A (en) * 1975-09-22 1977-03-25 Seiko Instr & Electronics Ltd Level shift circuit
JPH01196917A (ja) * 1988-02-01 1989-08-08 Seiko Epson Corp 半導体集積回路装置
JP2007180671A (ja) * 2005-12-27 2007-07-12 Toppan Printing Co Ltd レベルシフタ回路
JP4979955B2 (ja) 2006-02-02 2012-07-18 フリースケール セミコンダクター インコーポレイテッド レベルシフタ回路
JP2009171084A (ja) 2008-01-15 2009-07-30 Seiko Instruments Inc レベルシフタ回路

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040227558A1 (en) * 2000-10-30 2004-11-18 Renesas Technology Corp. Level shift circuit and semiconductor integrated circuit
US6791392B2 (en) * 2001-09-27 2004-09-14 Yamaha Corporation Circuit for shifting an input signal level including compensation for supply voltage variation
US20030132778A1 (en) * 2002-01-15 2003-07-17 Matsushita Electric Industrial Co., Ltd. Level shift circuit
JP2005217893A (ja) * 2004-01-30 2005-08-11 Toppan Printing Co Ltd クロック変換装置及びクロック発生装置並びに記録装置
CN1753309A (zh) * 2004-09-21 2006-03-29 株式会社瑞萨科技 变换信号的电压振幅的电平变换电路
CN1992525A (zh) * 2005-12-22 2007-07-04 松下电器产业株式会社 电平移动电路
CN101689849A (zh) * 2007-06-26 2010-03-31 高通股份有限公司 具有低占空比失真的电平转换器
CN101277108A (zh) * 2008-05-21 2008-10-01 友达光电股份有限公司 电平移位电路
CN101847989A (zh) * 2008-12-31 2010-09-29 东部高科股份有限公司 电平移位电路

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109428586A (zh) * 2017-08-29 2019-03-05 台湾积体电路制造股份有限公司 防止毛刺的输入/输出电路以及相关方法
CN109428586B (zh) * 2017-08-29 2022-08-05 台湾积体电路制造股份有限公司 防止毛刺的输入/输出电路以及相关方法

Also Published As

Publication number Publication date
US8829971B2 (en) 2014-09-09
JP2013115621A (ja) 2013-06-10
US20130135027A1 (en) 2013-05-30

Similar Documents

Publication Publication Date Title
US7821293B2 (en) Asynchronous interconnection system for 3D interchip communication
US7375574B2 (en) Semiconductor device
US7145363B2 (en) Level shifter
US7498833B2 (en) Semiconductor integrated circuit
JP2003168969A (ja) レベルシフト回路
JP2001036388A (ja) レベルシフト回路および半導体装置
TW202215781A (zh) 滯後電路、接收器及芯片
JP2004328443A (ja) 半導体装置
US7391249B2 (en) Multi-threshold CMOS latch circuit
CN101119114A (zh) 输出缓冲电路
CN103138740A (zh) 电平移位电路、集成电路装置、电子钟表
US8629721B2 (en) Output stage formed inside and on top of an SOI-type substrate
EP1762943A1 (en) Chip-to-chip communication system
US20110303988A1 (en) Semiconductor device and level shift circuit using the same
US20060226874A1 (en) Interface circuit including voltage level shifter
US8686882B2 (en) High-frequency semiconductor switch and terminal device
US7663403B2 (en) High-speed asynchronous digital signal level conversion circuit
US11855636B2 (en) Oscillator and clock generation circuit
JP4303387B2 (ja) 半導体集積回路
JP2001210718A (ja) 半導体集積回路及びその設計方法
KR100473386B1 (ko) 글리치가 제거된 디-플립플롭
US7741875B2 (en) Low amplitude differential output circuit and serial transmission interface using the same
US20100109703A1 (en) Output control circuit
TWI664819B (zh) 動態正反器及電子設備
US20090160517A1 (en) Flip-flop

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
AD01 Patent right deemed abandoned

Effective date of abandoning: 20161019

C20 Patent right or utility model deemed to be abandoned or is abandoned