JP2013004572A5 - - Google Patents
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- JP2013004572A5 JP2013004572A5 JP2011131206A JP2011131206A JP2013004572A5 JP 2013004572 A5 JP2013004572 A5 JP 2013004572A5 JP 2011131206 A JP2011131206 A JP 2011131206A JP 2011131206 A JP2011131206 A JP 2011131206A JP 2013004572 A5 JP2013004572 A5 JP 2013004572A5
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- Prior art keywords
- semiconductor substrate
- electrode
- forming
- gate electrode
- manufacturing
- Prior art date
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Claims (5)
- 可視光に対して透明な半導体基板の表面にソース電極及びドレイン電極を形成する工程と、
前記半導体基板の表面において前記ソース電極と前記ドレイン電極との間に表側ゲート電極を形成する工程と、
前記半導体基板の表面において前記ソース電極と前記ドレイン電極との間以外の領域に合わせマークを形成する工程と、
前記半導体基板を透過して見える前記合わせマークに基づいて前記半導体基板を位置合わせして、前記半導体基板の裏面において前記表側ゲート電極と対向する位置に裏側ゲート電極を形成する工程とを備えることを特徴とする半導体装置の製造方法。 - 前記表側ゲート電極と前記合わせマークを同時に形成することを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記表側ゲート電極はT字型であり、
前記表側ゲート電極のゲート長は、前記裏側ゲート電極のゲート長と同じであることを特徴とする請求項1又は2に記載の半導体装置の製造方法。 - 前記半導体基板の裏面に凹部を形成する工程と、
前記凹部内に前記裏側ゲート電極を形成する工程と、
前記凹部内に絶縁体を充填して前記裏側ゲート電極を前記絶縁体で覆う工程と、
前記絶縁体を充填した後に、前記半導体基板の裏面に、前記ソース電極と電気的に接続されたダイボンド用のメタルを形成する工程とを更に備えることを特徴とする請求項1〜3の何れか1項に記載の半導体装置の製造方法。 - 前記ソース電極及び前記ドレイン電極上に半田バンプを形成する工程と、
前記半導体基板の表面を回路基板側に向けて、前記半田バンプを介して前記ソース電極及び前記ドレイン電極を前記回路基板の電極に接合する工程とを更に備えることを特徴とする請求項1〜4の何れか1項に記載の半導体装置の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011131206A JP2013004572A (ja) | 2011-06-13 | 2011-06-13 | 半導体装置の製造方法 |
US13/355,991 US8778748B2 (en) | 2011-06-13 | 2012-01-23 | Method for manufacturing semiconductor device |
DE102012203844.2A DE102012203844B4 (de) | 2011-06-13 | 2012-03-12 | Verfahren zum Herstellen einer Halbleitervorrichtung |
CN201210191772.9A CN102832132B (zh) | 2011-06-13 | 2012-06-12 | 半导体装置的制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011131206A JP2013004572A (ja) | 2011-06-13 | 2011-06-13 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013004572A JP2013004572A (ja) | 2013-01-07 |
JP2013004572A5 true JP2013004572A5 (ja) | 2014-09-18 |
Family
ID=47220702
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011131206A Pending JP2013004572A (ja) | 2011-06-13 | 2011-06-13 | 半導体装置の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8778748B2 (ja) |
JP (1) | JP2013004572A (ja) |
CN (1) | CN102832132B (ja) |
DE (1) | DE102012203844B4 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9653516B2 (en) * | 2014-12-30 | 2017-05-16 | Win Semiconductors Corp. | Acoustic wave device structure, integrated structure of power amplifier and acoustic wave device, and fabrication methods thereof |
WO2023228267A1 (ja) * | 2022-05-24 | 2023-11-30 | 日本電信電話株式会社 | 電界効果トランジスタ |
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-
2011
- 2011-06-13 JP JP2011131206A patent/JP2013004572A/ja active Pending
-
2012
- 2012-01-23 US US13/355,991 patent/US8778748B2/en not_active Expired - Fee Related
- 2012-03-12 DE DE102012203844.2A patent/DE102012203844B4/de not_active Expired - Fee Related
- 2012-06-12 CN CN201210191772.9A patent/CN102832132B/zh not_active Expired - Fee Related
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