CN102832132B - 半导体装置的制造方法 - Google Patents

半导体装置的制造方法 Download PDF

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CN102832132B
CN102832132B CN201210191772.9A CN201210191772A CN102832132B CN 102832132 B CN102832132 B CN 102832132B CN 201210191772 A CN201210191772 A CN 201210191772A CN 102832132 B CN102832132 B CN 102832132B
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加茂宣卓
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Abstract

本发明涉及半导体装置的制造方法,能够在不损害设计的自由度的情况下容易地制造具有高的导通特性和截止特性的半导体装置。在对于可见光透明的半导体基板(1)的表面形成源极电极(2)以及漏极电极(3)。在半导体基板(1)的表面,在源极电极(2)和漏极电极(3)之间形成表面侧栅极电极(4)。在半导体基板(1)的表面,在源极电极(2)和漏极电极(3)之间以外的区域形成对准标记(5)。基于能够透过半导体基板(1)观察到的对准标记(5),对半导体基板(1)进行对位,在半导体基板(1)的背面,在与表面侧栅极电极(4)对置的位置形成背面侧栅极电极(6)。

Description

半导体装置的制造方法
技术领域
本发明涉及在基板的背面在与表面侧栅极电极对置的位置设置了背面侧栅极电极的半导体装置的制造方法。
背景技术
提出了为了提高截止特性而在源极电极和漏极电极之间设置了多个栅极电极的晶体管(例如,参照专利文献1)。为了提高成品率,需要确保栅极电极的间隔为一定距离以上。因此,源极电极和漏极电极的间隔变大,所以,导通电阻增大,产生电压降,输出受到损失,导致元件的导通特性的降低。这样,导通特性和截止特性处于折衷的关系。
相对于此,提出了在基板的背面在与表面侧栅极电极对置的位置设置了背面侧栅极电极的晶体管(例如,参照专利文献2)。由此,能够从表背两侧进行电流的通断控制,截止特性提高。此外,由于源极电极与漏极电极的间隔没有变大,所以,也能够防止导通特性的降低。
专利文献1:日本特开2007-73815号公报。
专利文献2:日本特开平9-82940号公报。
一般地,在对表面侧和背面侧的图案进行对位的情况下,使用利用显微镜同时观察基板的表面侧和背面侧的两面对准器。但是,两面对准器的对位精度是数μm~数十μm,所以,不能够应用于制造要求亚微米(sub-micron)以下的对位的晶体管。
在专利文献2中,在形成背面侧栅极电极时,将表面侧栅极电极作为掩模,从表面对在背面所涂敷的抗蚀剂进行曝光。因此,在表面侧栅极电极为T字形的情况下,背面侧栅极电极的栅极长度比表面栅极电极的栅极长度长。此外,由于使曝光用的光透过,所以,在沟道厚度方面存在制约。此外,在实际的半导体装置中,在表面侧栅极电极上设置有保护膜或电镀布线,所以,从表面进行曝光是困难的。
发明内容
本发明是为了解决上述课题而提出的,其目的在于得到一种能够在不损害设计的自由度的情况下容易地制造具有高的导通特性和截止特性的半导体装置的制造方法。
本发明提供一种半导体装置的制造方法,其特征在于,具有如下工序:在对于可见光透明的半导体基板的表面形成源极电极以及漏极电极;在所述半导体基板的表面,在所述源极电极和所述漏极电极之间形成表面侧栅极电极;在所述半导体基板的表面,在所述源极电极和所述漏极电极之间以外的区域形成对准标记;基于能够透过所述半导体基板观察到的所述对准标记,对所述半导体基板进行对位,在所述半导体基板的背面,在与所述表面侧栅极电极对置的位置形成背面侧栅极电极。
根据本发明,能够在不损害设计的自由度的情况下容易地制造具有高的导通特性和截止特性的半导体装置。
附图说明
图1是示出本发明的实施方式1的半导体装置的俯视图。
图2是沿着图1的Ⅰ-Ⅱ的剖面图。
图3是示出本发明的实施方式 1的半导体装置的制造方法的剖面图。
图4是示出本发明的实施方式 1的半导体装置的制造方法的剖面图。
图5是示出本发明的实施方式 1的半导体装置的制造方法的剖面图。
图6是示出本发明的实施方式 1的半导体装置的制造方法的剖面图。
图7是示出本发明的实施方式 1的半导体装置的制造方法的剖面图。
图8是示出本发明的实施方式 1的半导体装置的制造方法的剖面图。
图9是示出本发明的实施方式 1的半导体装置的制造方法的剖面图。
图10是示出本发明的实施方式 1的半导体装置的制造方法的剖面图。
图11是示出本发明的实施方式2的半导体装置的剖面图。
图12是示出本发明的实施方式3的半导体装置的剖面图。
图13是示出本发明的实施方式4的半导体装置的制造方法的剖面图。
图14是示出本发明的实施方式4的半导体装置的制造方法的剖面图。
附图标记说明:
1  半导体基板
2  源极电极
3  漏极电极
4  表面侧栅极电极
5  对准标记
6  背面侧栅极电极
7  凹部
13  绝缘体
14  金属
15  焊料凸起
16 电路基板
17  电极。
具体实施方式
参照附图对本发明的实施方式的半导体装置的制造方法进行说明。对相同或者对应的结构要素标注相同的附图标记,有时省略重复的说明。
实施方式1
图1是示出本发明的实施方式1的半导体装置的俯视图。图2是沿着图1的Ⅰ-Ⅱ的剖面图。半导体基板1对于可见光为透明,是例如SiC或GaN等宽带隙半导体。
在半导体基板1的表面设置有源极电极2与漏极电极3,在两者之间设置有表面侧栅极电极4。在半导体基板1的表面,在源极电极2和漏极电极3之间以外的区域设置有对准标记5。在半导体基板1的背面,在与表面侧栅极电极 4对置的位置设置有背面侧栅极电极6。背面侧栅极电极6配置在设置于半导体基板1的背面的凹部7内。
源极电极2和漏极电极3是例如Au。表面侧栅极电极4、对准标记5以及背面侧栅极电极6是例如Pt/Au。表面侧栅极电极4和背面侧栅极电极6彼此电连接,分别与半导体基板1的表面和背面进行肖特基接合。对该表面侧栅极电极4和背面侧栅极电极6施加栅极电压,由此,对在源极电极2和漏极电极3之间流过的电流的通断进行控制。
接着,对本实施方式的半导体装置的制造方法进行说明。图3~图10是示出本发明的实施方式1的半导体装置的制造方法的剖面图。
首先,如图3所示,在半导体基板1的表面涂敷光致抗蚀剂8。利用曝光以及显影在光致抗蚀剂8上形成源极电极2和栅极电极3用的图形。
然后,如图4所示,在半导体基板1的表面利用蒸镀剥离形成源极电极2和漏极电极3。然后,将光致抗蚀剂8除去。
然后,如图5所示,在半导体基板1的表面涂敷光致抗蚀剂9。利用曝光以及显影在光致抗蚀剂9上形成表面侧栅极电极4和对准标记5用的图形。
然后,如图6所示,在半导体基板1的表面,利用蒸镀剥离同时形成表面侧栅极电极4和对准标记5。但是,表面侧栅极电极4形成在源极电极2和漏极电极3之间,对准标记5形成在源极电极2和漏极电极3之间以外的区域。然后,将光致抗蚀剂9除去。
然后,如图7所示,在半导体基板1的表面涂敷保护用的光致抗蚀剂10。并且,如图8所示,使半导体基板1的表面朝上,将半导体基板1贴附在玻璃基板等的支持基板11上。
然后,如图9所示,基于能够透过半导体基板1观察到的对准标记5,利用通常的分档器(缩小投影型曝光装置)对半导体基板1进行对位。在半导体基板1的背面涂敷光致抗蚀剂12。利用曝光以及显影在光致抗蚀剂12上形成背面侧栅极电极6用的图形。使用该图形在半导体基板1的背面形成凹部7。
然后,如图10所示,在半导体基板1的背面,在与表面侧栅极电极4对置的位置,利用蒸镀剥离形成背面侧栅极电极6。然后,将光致抗蚀剂12除去。将半导体装置从支持基板11上剥离,将光致抗蚀剂10除去。利用以上的工序,制造出本实施方式的半导体装置。
接着,对本实施方式的效果进行说明。在半导体基板1的背面,在与表面侧栅极电极4对置的位置设置背面侧栅极电极6,所以,能够从表背两侧进行电流的通断控制,截止特性提高。
此外,在源极电极2与漏极电极3之间以外的区域形成对准标记5,所以,源极电极2和漏极电极3的间隔不会变大。因此,能够防止导通特性的降低。
此外,基于能够透过半导体基板1观察到的对准标记5进行对位,所以,能够精度较好地将背面侧栅极电极6相对于表面侧栅极电极4进行对位。
此外,以往需要从表面对在背面所涂敷的抗蚀剂进行曝光,但是,在本实施方式中,透过半导体基板1观察到对准标记5即可。因此,与以往的方法相比,沟道厚度的制约较轻。
此外,在本实施方式中,在形成背面侧栅极电极6时从背面进行曝光,所以,与从表面进行曝光的现有的方法相比,容易制造。
因此,根据本实施方式的半导体装置的制造方法,能够在不损害设计的自由度的情况下容易地制造具有高的导通特性和截止特性的半导体装置。
此外,由于同时形成表面侧电极4和对准标记5,所以,不需要新追加用于形成对准标记5的制造工序。
实施方式2
图11是示出本发明的实施方式2的半导体装置的剖面图。在本实施方式中,表面侧栅极电极4是T字形。表面侧栅极电极4的栅极长度与背面侧栅极电极6的栅极长度相同。其他结构以及制造方法与实施方式1相同。
在表面侧栅极电极4为T字形的情况下,在将表面侧栅极电极4作为掩模从表面对在背面涂敷的抗蚀剂进行曝光的现有的方法中,背面侧栅极电极6的栅极长度比表面侧栅极电极4的栅极长度长。相对于此,在本实施方式中,在形成背面侧栅极电极6时从背面进行曝光,所以,能够使表面侧栅极电极4的栅极长度与背面侧栅极电极6的栅极长度相同。
实施方式3
图12是示出本发明的实施方式3的半导体装置的剖面图。在本实施方式中,在凹部7内填充绝缘体13,用绝缘体13覆盖背面侧栅极电极6。绝缘体13是例如SiN。然后,在半导体基板1的背面形成与源极电极2电连接的芯片焊接用的金属14。其他结构以及制造方法与实施方式1相同。这样,用绝缘体13覆盖背面侧栅极电极6,由此,能够防止背面侧栅极电极6和源极电极2发生短路。
实施方式4
图13以及图14是示出本发明的实施方式4的半导体装置的制造方法的剖面图。首先,如图13所示,在源极电极2和漏极电极3上形成焊料凸起15。然后,如图14所示,使半导体基板1的表面朝向电路基板16侧,经由焊料凸起15将源极电极2以及所述漏极电极3接合在电路基板16的电极17上。即,以面朝下方式将半导体装置安装在电路基板16上。由此,能够防止半导体基板1的背面的背面侧栅极电极6接触到电路基板16而发生物理性破坏。

Claims (5)

1.一种半导体装置的制造方法,其特征在于,具有如下工序:
在对于可见光透明的半导体基板的表面形成源极电极以及漏极电极;
在所述半导体基板的表面,在所述源极电极和所述漏极电极之间形成表面侧栅极电极;
在所述半导体基板的表面,在所述源极电极和所述漏极电极之间以外的区域形成对准标记;
基于能够透过所述半导体基板观察到的所述对准标记,对所述半导体基板进行对位,在所述半导体基板的背面,在与所述表面侧栅极电极对置的位置形成背面侧栅极电极。
2.如权利要求1所述的半导体装置的制造方法,其特征在于,
同时形成所述表面侧栅极电极和所述对准标记。
3.如权利要求1或2所述的半导体装置的制造方法,其特征在于,
所述表面侧栅极电极是T字形,
所述表面侧栅极电极的栅极长度与所述背面侧栅极电极的栅极长度相同。
4.如权利要求1或2所述的半导体装置的制造方法,其特征在于,还具有如下工序:
在所述半导体基板的背面形成凹部;
在所述凹部内形成所述背面侧栅极电极;
在所述凹部内填充绝缘体,用所述绝缘体覆盖所述背面侧栅极电极;
在填充所述绝缘体之后,在所述半导体基板的背面形成与所述源极电极电连接的芯片焊接用的金属。
5.如权利要求1或2所述的半导体装置的制造方法,其特征在于,还具有如下工序:
在所述源极电极以及所述漏极电极上形成焊料凸起;
使所述半导体基板的表面朝向电路基板侧,经由所述焊料凸起将所述源极电极以及所述漏极电极接合到所述电路基板的电极上。
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