JP2011228704A5 - - Google Patents

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Publication number
JP2011228704A5
JP2011228704A5 JP2011088708A JP2011088708A JP2011228704A5 JP 2011228704 A5 JP2011228704 A5 JP 2011228704A5 JP 2011088708 A JP2011088708 A JP 2011088708A JP 2011088708 A JP2011088708 A JP 2011088708A JP 2011228704 A5 JP2011228704 A5 JP 2011228704A5
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JP
Japan
Prior art keywords
array
interconnect
macropin
hybrid
joint
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2011088708A
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English (en)
Japanese (ja)
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JP2011228704A (ja
JP5906022B2 (ja
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Publication date
Priority claimed from US12/762,610 external-priority patent/US8296940B2/en
Application filed filed Critical
Publication of JP2011228704A publication Critical patent/JP2011228704A/ja
Publication of JP2011228704A5 publication Critical patent/JP2011228704A5/ja
Application granted granted Critical
Publication of JP5906022B2 publication Critical patent/JP5906022B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2011088708A 2010-04-19 2011-04-13 マクロピンハイブリッド相互接続アレイ及びその製造方法 Expired - Fee Related JP5906022B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/762,610 US8296940B2 (en) 2010-04-19 2010-04-19 Method of forming a micro pin hybrid interconnect array
US12/762,610 2010-04-19

Publications (3)

Publication Number Publication Date
JP2011228704A JP2011228704A (ja) 2011-11-10
JP2011228704A5 true JP2011228704A5 (enExample) 2014-05-29
JP5906022B2 JP5906022B2 (ja) 2016-04-20

Family

ID=44280969

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011088708A Expired - Fee Related JP5906022B2 (ja) 2010-04-19 2011-04-13 マクロピンハイブリッド相互接続アレイ及びその製造方法

Country Status (3)

Country Link
US (2) US8296940B2 (enExample)
EP (1) EP2378551A3 (enExample)
JP (1) JP5906022B2 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5832956B2 (ja) 2012-05-25 2015-12-16 株式会社東芝 半導体発光装置
JP5869961B2 (ja) 2012-05-28 2016-02-24 株式会社東芝 半導体発光装置
US9351436B2 (en) * 2013-03-08 2016-05-24 Cochlear Limited Stud bump bonding in implantable medical devices
DE102013214575B3 (de) * 2013-07-25 2014-09-18 Siemens Aktiengesellschaft Halbleiterelement mit Lötstopplage und Verfahren zu seiner Erzeugung sowie Strahlungsdetektor und medizintechnisches Gerät mit einem solchen Strahlungsdetektor
US20150149534A1 (en) * 2013-11-25 2015-05-28 Contadd Limited Systems and methods for creating, displaying and managing content units
US20150276945A1 (en) 2014-03-25 2015-10-01 Oy Ajat Ltd. Semiconductor bump-bonded x-ray imaging device
US11121302B2 (en) 2018-10-11 2021-09-14 SeeQC, Inc. System and method for superconducting multi-chip module

Family Cites Families (23)

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Publication number Priority date Publication date Assignee Title
US4545610A (en) * 1983-11-25 1985-10-08 International Business Machines Corporation Method for forming elongated solder connections between a semiconductor device and a supporting substrate
MX9704632A (es) 1994-12-23 1998-02-28 Digirad Camara semiconductora de rayos gama y sistema medico de formacion de imagenes.
WO1999045411A1 (en) 1997-02-18 1999-09-10 Simage Oy Semiconductor imaging device
JPH1117309A (ja) * 1997-06-19 1999-01-22 Hitachi Ltd 電子部品の接続機構、これを用いた電子回路基板、接続機構の製造方法
US6337445B1 (en) * 1998-03-16 2002-01-08 Texas Instruments Incorporated Composite connection structure and method of manufacturing
US6657313B1 (en) * 1999-01-19 2003-12-02 International Business Machines Corporation Dielectric interposer for chip to substrate soldering
JP3872236B2 (ja) * 1999-09-28 2007-01-24 京セラ株式会社 配線基板およびその実装構造
US6683375B2 (en) 2001-06-15 2004-01-27 Fairchild Semiconductor Corporation Semiconductor die including conductive columns
DE10164494B9 (de) * 2001-12-28 2014-08-21 Epcos Ag Verkapseltes Bauelement mit geringer Bauhöhe sowie Verfahren zur Herstellung
US6852926B2 (en) * 2002-03-26 2005-02-08 Intel Corporation Packaging microelectromechanical structures
US20040007779A1 (en) * 2002-07-15 2004-01-15 Diane Arbuthnot Wafer-level method for fine-pitch, high aspect ratio chip interconnect
DE10238523B4 (de) * 2002-08-22 2014-10-02 Epcos Ag Verkapseltes elektronisches Bauelement und Verfahren zur Herstellung
US7223981B1 (en) 2002-12-04 2007-05-29 Aguila Technologies Inc. Gamma ray detector modules
US8641913B2 (en) * 2003-10-06 2014-02-04 Tessera, Inc. Fine pitch microcontacts and method for forming thereof
US7170049B2 (en) 2003-12-30 2007-01-30 Dxray, Inc. Pixelated cadmium zinc telluride based photon counting mode detector
US7176043B2 (en) 2003-12-30 2007-02-13 Tessera, Inc. Microelectronic packages and methods therefor
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FR2890235B1 (fr) * 2005-08-30 2007-09-28 Commissariat Energie Atomique Procede d'hybridation par protuberances de soudure de tailles differentes de deux composants entre eux et dispositif mettant en oeuvre deux composants hybrides entre eux selon ce procede
JP2007214191A (ja) * 2006-02-07 2007-08-23 Sumitomo Heavy Ind Ltd 放射線検出器および放射線検査装置
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JP2009081153A (ja) 2007-09-25 2009-04-16 Taiyo Yuden Co Ltd 半導体装置及び半導体装置を実装した回路装置
SG152101A1 (en) 2007-11-06 2009-05-29 Agency Science Tech & Res An interconnect structure and a method of fabricating the same

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