JP2011176163A - 不揮発性半導体記憶装置 - Google Patents

不揮発性半導体記憶装置 Download PDF

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Publication number
JP2011176163A
JP2011176163A JP2010039685A JP2010039685A JP2011176163A JP 2011176163 A JP2011176163 A JP 2011176163A JP 2010039685 A JP2010039685 A JP 2010039685A JP 2010039685 A JP2010039685 A JP 2010039685A JP 2011176163 A JP2011176163 A JP 2011176163A
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JP
Japan
Prior art keywords
memory device
impurity layer
semiconductor memory
well
nonvolatile semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2010039685A
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English (en)
Japanese (ja)
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JP2011176163A5 (enExample
Inventor
Ichiro Matsuo
一郎 松尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Priority to JP2010039685A priority Critical patent/JP2011176163A/ja
Priority to PCT/JP2010/005107 priority patent/WO2011104773A1/ja
Publication of JP2011176163A publication Critical patent/JP2011176163A/ja
Priority to US13/553,497 priority patent/US8928056B2/en
Publication of JP2011176163A5 publication Critical patent/JP2011176163A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/62—Capacitors having potential barriers
    • H10D1/66—Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/60—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the control gate being a doped region, e.g. single-poly memory cell
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/411—PN diodes having planar bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors

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  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2010039685A 2010-02-25 2010-02-25 不揮発性半導体記憶装置 Pending JP2011176163A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2010039685A JP2011176163A (ja) 2010-02-25 2010-02-25 不揮発性半導体記憶装置
PCT/JP2010/005107 WO2011104773A1 (ja) 2010-02-25 2010-08-18 不揮発性半導体記憶装置
US13/553,497 US8928056B2 (en) 2010-02-25 2012-07-19 Nonvolatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010039685A JP2011176163A (ja) 2010-02-25 2010-02-25 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2011176163A true JP2011176163A (ja) 2011-09-08
JP2011176163A5 JP2011176163A5 (enExample) 2012-08-30

Family

ID=44506222

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010039685A Pending JP2011176163A (ja) 2010-02-25 2010-02-25 不揮発性半導体記憶装置

Country Status (3)

Country Link
US (1) US8928056B2 (enExample)
JP (1) JP2011176163A (enExample)
WO (1) WO2011104773A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018173941A (ja) * 2017-03-31 2018-11-08 旭化成エレクトロニクス株式会社 不揮発性記憶素子および基準電圧生成回路
JP2022008656A (ja) * 2017-03-31 2022-01-13 旭化成エレクトロニクス株式会社 不揮発性記憶素子および基準電圧生成回路

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102544122B (zh) * 2012-02-21 2013-12-18 无锡来燕微电子有限公司 一种具有p+单一多晶架构的非挥发性记忆体及其制备方法
CN103022045A (zh) * 2012-12-28 2013-04-03 无锡来燕微电子有限公司 一种具有p+且pmos晶体管没有轻掺杂区域的单一多晶架构的非挥发性记忆体及其制备方法
US9553011B2 (en) 2012-12-28 2017-01-24 Texas Instruments Incorporated Deep trench isolation with tank contact grounding
US10056503B2 (en) 2016-10-25 2018-08-21 International Business Machines Corporation MIS capacitor for finned semiconductor structure
CN111640747B (zh) * 2019-09-27 2025-09-12 福建省晋华集成电路有限公司 半导体器件及其电接触结构与制造方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59158546A (ja) * 1983-02-28 1984-09-08 Mitsubishi Electric Corp 相補形ｍｏｓ集積回路装置
JPH01251751A (ja) * 1988-03-31 1989-10-06 Seiko Epson Corp 半導体装置
JPH04155862A (ja) * 1990-10-18 1992-05-28 Hitachi Ltd 半導体集積回路装置
JPH06334190A (ja) * 1993-05-07 1994-12-02 Internatl Business Mach Corp <Ibm> Ｅｅｐｒｏｍおよびかかるｅｅｐｒｏｍを含む論理ｌｓｉチップ
JP2002033397A (ja) * 2000-07-18 2002-01-31 Mitsubishi Electric Corp 半導体装置
JP2007173834A (ja) * 2005-12-22 2007-07-05 Samsung Electronics Co Ltd 単一ゲート構造を有するｅｅｐｒｏｍ、該ｅｅｐｒｏｍの動作方法及び該ｅｅｐｒｏｍの製造方法
JP2009054909A (ja) * 2007-08-29 2009-03-12 Panasonic Corp 半導体装置、その製造方法及び駆動方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5844300A (en) * 1996-09-19 1998-12-01 Intel Corporation Single poly devices for monitoring the level and polarity of process induced charging in a MOS process
JP3221369B2 (ja) 1997-09-19 2001-10-22 日本電気株式会社 不揮発性半導体記憶装置及びその製造方法
US6621128B2 (en) * 2001-02-28 2003-09-16 United Microelectronics Corp. Method of fabricating a MOS capacitor
JP2007123830A (ja) * 2005-09-29 2007-05-17 Matsushita Electric Ind Co Ltd 不揮発性半導体記憶装置
US7612397B2 (en) * 2006-11-10 2009-11-03 Sharp Kabushiki Kaisha Memory cell having first and second capacitors with electrodes acting as control gates for nonvolatile memory transistors
US7688627B2 (en) * 2007-04-24 2010-03-30 Intersil Americas Inc. Flash memory array of floating gate-based non-volatile memory cells

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59158546A (ja) * 1983-02-28 1984-09-08 Mitsubishi Electric Corp 相補形ｍｏｓ集積回路装置
JPH01251751A (ja) * 1988-03-31 1989-10-06 Seiko Epson Corp 半導体装置
JPH04155862A (ja) * 1990-10-18 1992-05-28 Hitachi Ltd 半導体集積回路装置
JPH06334190A (ja) * 1993-05-07 1994-12-02 Internatl Business Mach Corp <Ibm> Ｅｅｐｒｏｍおよびかかるｅｅｐｒｏｍを含む論理ｌｓｉチップ
JP2002033397A (ja) * 2000-07-18 2002-01-31 Mitsubishi Electric Corp 半導体装置
JP2007173834A (ja) * 2005-12-22 2007-07-05 Samsung Electronics Co Ltd 単一ゲート構造を有するｅｅｐｒｏｍ、該ｅｅｐｒｏｍの動作方法及び該ｅｅｐｒｏｍの製造方法
JP2009054909A (ja) * 2007-08-29 2009-03-12 Panasonic Corp 半導体装置、その製造方法及び駆動方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018173941A (ja) * 2017-03-31 2018-11-08 旭化成エレクトロニクス株式会社 不揮発性記憶素子および基準電圧生成回路
JP2022008656A (ja) * 2017-03-31 2022-01-13 旭化成エレクトロニクス株式会社 不揮発性記憶素子および基準電圧生成回路
JP7194795B2 (ja) 2017-03-31 2022-12-22 旭化成エレクトロニクス株式会社 基準電圧生成回路

Also Published As

Publication number Publication date
US20120286343A1 (en) 2012-11-15
US8928056B2 (en) 2015-01-06
WO2011104773A1 (ja) 2011-09-01

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