JP2011029374A - 半導体パッケージおよび半導体パッケージモジュール - Google Patents
半導体パッケージおよび半導体パッケージモジュール Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 130
- 229910000679 solder Inorganic materials 0.000 claims abstract description 57
- 230000001681 protective effect Effects 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims description 35
- 230000002093 peripheral effect Effects 0.000 claims description 23
- 238000002161 passivation Methods 0.000 abstract description 12
- 238000005452 bending Methods 0.000 abstract description 5
- 230000035882 stress Effects 0.000 description 36
- 230000006355 external stress Effects 0.000 description 12
- 239000011347 resin Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- 239000000463 material Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 1
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- 239000002131 composite material Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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Abstract
【解決手段】半導体パッケージ10は、平板形状のダイ11を有し、ダイ11の実装面11Fに複数のボンディングパッド12は配列形成されている。また、実装面11Fには、パッシべーション膜13と保護膜14とがボンディングパッド12の中央領域を開口するように形成されている。この開口部には、ボンディングパッド12に接合するUBM15が形成されており、各UBM15の表面には半田バンプ16が形成されている。この際、ダイ11の角部に形成されたUBM15Eは、ダイ11の中央位置に形成されたUBM15Cよりも小さい径で形成され、バネ係数が低く設定されている。
【選択図】 図2
Description
図1(A)は、本実施形態の半導体パッケージ10をダイ11の実装面11F側から見た外観斜視図である。図1(B)は当該半導体パッケージ10をダイ11の実装面11F側から見た平面図である。
以上のような構成により、本実施形態の半導体パッケージ10が形成される。
図5(A)は、本実施形態の半導体パッケージ10Aをダイ11の実装面11F側から見た外観斜視図である。図5(B)は当該半導体パッケージ10Aをダイ11の実装面11F側から見た平面図である。
図6は本実施形態の半導体パッケージ10Bをダイ11の実装面11F側から見た平面図である。
本実施形態の半導体パッケージ10Bは、UBM15の位置毎に径が異なるものであり、他の構成は、第1の実施形態に示した半導体パッケージ10と同じである。
Claims (8)
- 所定の電子回路が形成された半導体で平板状のダイと、該ダイの実装面に配列形成された複数ボンディングパッドと、該複数のボンディングパッドの表面にそれぞれに形成され、該表面に垂直な方向へ延びる形状からなるUBMと、を備えた半導体パッケージであって、
前記ダイの角部のボンディングパッドに形成されたUBMは、前記ダイの略中央位置のボンディングパッドに形成されたUBMに対して、バネ係数が低い構造で形成されている、半導体パッケージ。 - 所定の電子回路が形成された半導体で平板状のダイと、該ダイの実装面に配列形成された複数ボンディングパッドと、該複数のボンディングパッドの表面にそれぞれに形成され、該表面に垂直な方向へ延びる形状からなるUBMと、を備えた半導体パッケージであって、
前記ダイの外周辺部のボンディングパッドに形成されたUBMは、前記ダイの略中央位置のボンディングパッドに形成されたUBMに対して、バネ係数が低い構造で形成されている、半導体パッケージ。 - 前記バネ係数が低い構造のUBMの径は、前記ダイの略中央位置のボンディングパッドに形成されたUBMの径よりも小さく形成されている、請求項1または請求項2に記載の半導体パッケージ。
- 前記UBMは、前記ボンディングパッドに接続する部分と、該ボンディングパッドに接続する部分の先端に形成され半田バンプが形成される部分と、からなり、
前記バネ係数が低い構造のUBMの前記ボンディングパッドに接続する部分の径が、前記ダイの略中央位置のボンディングパッドに形成されたUBMの前記ボンディングパッドに接続する部分の径よりも小さく形成されている、請求項3に記載の半導体パッケージ。 - 前記ボンディングパッドのそれぞれを部分的に覆い、前記UBMの前記ボンディングパッドに接続する部分を囲む形状からなり所定の弾性を有する保護膜を備えた、請求項4に記載の半導体パッケージ。
- 所定の電子回路が形成された半導体で平板状のダイと、該ダイの実装面に配列形成された複数ボンディングパッドと、該複数のボンディングパッドの表面にそれぞれに形成され、該表面に垂直な方向へ延びる形状からなるUBMと、を備えた半導体パッケージであって、
各ボンディングパッドに形成されるUBMは、前記ダイの略中央位置のボンディングパッドに形成されたUBMからの距離に応じてバネ係数が低くなるような構造に形成されている、半導体パッケージ。 - 前記各ボンディングパッドに形成されるUBMの径は、前記ダイの略中央位置のボンディングパッドに形成されたUBMからの距離に応じて小さくなるように形成されている、請求項6に記載の半導体パッケージ。
- 請求項1〜請求項7に記載の半導体パッケージと、
該半導体パッケージの各半田バンプに対向する位置に形成された実装用ランドを有する実装用基板と、を備え、
各UBMがそれぞれの半田バンプにより前記実装用ランドに接合されてなる、半導体パッケージモジュール。
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