JP2010539723A - エピタキシャル固体半導体ヘテロ構造及びその製造方法 - Google Patents

エピタキシャル固体半導体ヘテロ構造及びその製造方法 Download PDF

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JP2010539723A
JP2010539723A JP2010525404A JP2010525404A JP2010539723A JP 2010539723 A JP2010539723 A JP 2010539723A JP 2010525404 A JP2010525404 A JP 2010525404A JP 2010525404 A JP2010525404 A JP 2010525404A JP 2010539723 A JP2010539723 A JP 2010539723A
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semiconductor
layer
substrate
iii
single crystal
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JP2010539723A5 (https=
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サン−ジロン,ギローム
ラルジョ,ルドビク
パトリアルシュ,ジル
ルグルニ,フィリップ
オランジュ,ギュイ
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サントル ナシオナル ドゥ ラ ルシェルシェサイアンティフィク(セエヌエールエス)
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Publication of JP2010539723A publication Critical patent/JP2010539723A/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2902Materials being Group IVA materials
    • H10P14/2905Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202Materials thereof
    • H10P14/3238Materials thereof being insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242Structure
    • H10P14/3244Layer structure
    • H10P14/3248Layer structure consisting of two layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3418Phosphides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3421Arsenides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926Crystal orientations

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  • Recrystallisation Techniques (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Vapour Deposition (AREA)
JP2010525404A 2007-09-18 2008-09-17 エピタキシャル固体半導体ヘテロ構造及びその製造方法 Pending JP2010539723A (ja)

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Application Number Priority Date Filing Date Title
FR0757652A FR2921200B1 (fr) 2007-09-18 2007-09-18 Heterostructures semi-conductrices monolithiques epitaxiees et leur procede de fabrication
PCT/FR2008/051669 WO2009047448A1 (fr) 2007-09-18 2008-09-17 Hétérostructures semi-conductrices monolithiques épitaxiées et leur procédé de fabrication

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JP2014138772A Division JP6062887B2 (ja) 2007-09-18 2014-07-04 エピタキシャル固体半導体ヘテロ構造及びその製造方法

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JP2010539723A true JP2010539723A (ja) 2010-12-16
JP2010539723A5 JP2010539723A5 (https=) 2011-10-27

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JP2010525404A Pending JP2010539723A (ja) 2007-09-18 2008-09-17 エピタキシャル固体半導体ヘテロ構造及びその製造方法
JP2014138772A Expired - Fee Related JP6062887B2 (ja) 2007-09-18 2014-07-04 エピタキシャル固体半導体ヘテロ構造及びその製造方法
JP2016205042A Pending JP2017028318A (ja) 2007-09-18 2016-10-19 エピタキシャル固体半導体ヘテロ構造及びその製造方法

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JP2014138772A Expired - Fee Related JP6062887B2 (ja) 2007-09-18 2014-07-04 エピタキシャル固体半導体ヘテロ構造及びその製造方法
JP2016205042A Pending JP2017028318A (ja) 2007-09-18 2016-10-19 エピタキシャル固体半導体ヘテロ構造及びその製造方法

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US (1) US8389995B2 (https=)
EP (1) EP2188830A1 (https=)
JP (3) JP2010539723A (https=)
FR (1) FR2921200B1 (https=)
WO (1) WO2009047448A1 (https=)

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* Cited by examiner, † Cited by third party
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JP5585137B2 (ja) * 2010-03-17 2014-09-10 行男 渡部 金属酸化物を含むへテロ構造の作製法及び該金属酸化物の製造法
US8846506B2 (en) * 2012-04-26 2014-09-30 The University Of North Carolina At Charlotte Enhanced electron mobility at the interface between Gd2O3(100)/N-Si(100)
GB2517697A (en) 2013-08-27 2015-03-04 Ibm Compound semiconductor structure
FR3069705A1 (fr) 2017-07-28 2019-02-01 Centre National De La Recherche Scientifique Cellule photovoltaique tandem
CN113284839B (zh) * 2021-05-21 2024-07-02 中国科学院上海微系统与信息技术研究所 一种钻石晶体的异质键合方法及异质结构
CN116102085B (zh) * 2023-02-24 2024-08-20 黑龙江大学 一种原位制备铁系尖晶石异质结阵列材料的方法

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US20030024471A1 (en) * 2001-08-06 2003-02-06 Motorola, Inc. Fabrication of semiconductor structures and devices forms by utilizing laser assisted deposition
JP2003282439A (ja) * 2002-03-27 2003-10-03 Seiko Epson Corp デバイス用基板およびデバイス用基板の製造方法
JP2003306399A (ja) * 2002-03-06 2003-10-28 Agilent Technol Inc シリコン基板上にリン化インジウム層を形成する方法
WO2004051725A1 (ja) * 2002-12-03 2004-06-17 Nikko Materials Co., Ltd. エピタキシャル成長方法およびエピタキシャル成長用基板
JP2005524977A (ja) * 2002-05-03 2005-08-18 フリースケール セミコンダクター インコーポレイテッド 半導体素子をその上に搭載する単結晶酸化物

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JPH06216051A (ja) * 1992-12-02 1994-08-05 Xerox Corp エピタキシャル(111) 緩衝層を有する構造
US20030024471A1 (en) * 2001-08-06 2003-02-06 Motorola, Inc. Fabrication of semiconductor structures and devices forms by utilizing laser assisted deposition
JP2003306399A (ja) * 2002-03-06 2003-10-28 Agilent Technol Inc シリコン基板上にリン化インジウム層を形成する方法
JP2003282439A (ja) * 2002-03-27 2003-10-03 Seiko Epson Corp デバイス用基板およびデバイス用基板の製造方法
JP2005524977A (ja) * 2002-05-03 2005-08-18 フリースケール セミコンダクター インコーポレイテッド 半導体素子をその上に搭載する単結晶酸化物
WO2004051725A1 (ja) * 2002-12-03 2004-06-17 Nikko Materials Co., Ltd. エピタキシャル成長方法およびエピタキシャル成長用基板

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Publication number Publication date
FR2921200B1 (fr) 2009-12-18
JP2015008293A (ja) 2015-01-15
JP2017028318A (ja) 2017-02-02
US8389995B2 (en) 2013-03-05
FR2921200A1 (fr) 2009-03-20
WO2009047448A1 (fr) 2009-04-16
EP2188830A1 (fr) 2010-05-26
JP6062887B2 (ja) 2017-01-18
US20100289063A1 (en) 2010-11-18

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