JP2010282399A5 - - Google Patents

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Publication number
JP2010282399A5
JP2010282399A5 JP2009134884A JP2009134884A JP2010282399A5 JP 2010282399 A5 JP2010282399 A5 JP 2010282399A5 JP 2009134884 A JP2009134884 A JP 2009134884A JP 2009134884 A JP2009134884 A JP 2009134884A JP 2010282399 A5 JP2010282399 A5 JP 2010282399A5
Authority
JP
Japan
Prior art keywords
clock
divided
selection signal
frequency
clocks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009134884A
Other languages
English (en)
Japanese (ja)
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JP2010282399A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2009134884A priority Critical patent/JP2010282399A/ja
Priority claimed from JP2009134884A external-priority patent/JP2010282399A/ja
Priority to US12/787,687 priority patent/US8253449B2/en
Publication of JP2010282399A publication Critical patent/JP2010282399A/ja
Publication of JP2010282399A5 publication Critical patent/JP2010282399A5/ja
Pending legal-status Critical Current

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JP2009134884A 2009-06-04 2009-06-04 クロック切替回路 Pending JP2010282399A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009134884A JP2010282399A (ja) 2009-06-04 2009-06-04 クロック切替回路
US12/787,687 US8253449B2 (en) 2009-06-04 2010-05-26 Clock switch circuit and clock switch method of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009134884A JP2010282399A (ja) 2009-06-04 2009-06-04 クロック切替回路

Publications (2)

Publication Number Publication Date
JP2010282399A JP2010282399A (ja) 2010-12-16
JP2010282399A5 true JP2010282399A5 (enExample) 2012-04-05

Family

ID=43300288

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009134884A Pending JP2010282399A (ja) 2009-06-04 2009-06-04 クロック切替回路

Country Status (2)

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US (1) US8253449B2 (enExample)
JP (1) JP2010282399A (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102190962B1 (ko) 2013-12-30 2020-12-14 삼성전자주식회사 코맨드 처리 회로 및 이를 포함하는 메모리 장치
US9703314B2 (en) 2014-02-26 2017-07-11 Telefonaktiebolaget Lm Ericsson (Publ) Method and apparatus for a variable frequency and phase clock generation circuit
JP6503214B2 (ja) * 2015-03-30 2019-04-17 ルネサスエレクトロニクス株式会社 電子装置
KR20170126239A (ko) * 2016-05-09 2017-11-17 에스케이하이닉스 주식회사 제어 회로 및 이를 포함하는 메모리 장치
JP7418159B2 (ja) * 2019-04-19 2024-01-19 キヤノン株式会社 情報処理装置
CN111092618A (zh) * 2019-12-23 2020-05-01 珠海全志科技股份有限公司 片上系统调频设备的频率调整方法及装置
US12353240B2 (en) * 2021-12-22 2025-07-08 Intel Corporation Selectable clock sources
EP4439234A1 (en) * 2023-03-31 2024-10-02 STMicroelectronics International N.V. Reduced power consumption circuit and corresponding method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2745869B2 (ja) * 1991-07-11 1998-04-28 日本電気株式会社 可変クロック分周回路
JPH05300008A (ja) * 1992-04-22 1993-11-12 Fujitsu Ltd Ｐｌｌ回路
JP4077988B2 (ja) * 1999-07-19 2008-04-23 株式会社ルネサステクノロジ クロック生成回路
JP2003216268A (ja) * 2002-01-28 2003-07-31 Nec Microsystems Ltd クロック選択回路およびクロック選択方法
JP2004206480A (ja) * 2002-12-25 2004-07-22 Seiko Epson Corp 半導体集積回路
JP2008123402A (ja) 2006-11-15 2008-05-29 Yaskawa Electric Corp 可変クロック発生回路および可変クロック発生回路を備えたサーボドライブ装置
JP5250745B2 (ja) * 2007-08-08 2013-07-31 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー クロック切替回路

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