JP2010273185A5 - - Google Patents
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- Publication number
- JP2010273185A5 JP2010273185A5 JP2009124157A JP2009124157A JP2010273185A5 JP 2010273185 A5 JP2010273185 A5 JP 2010273185A5 JP 2009124157 A JP2009124157 A JP 2009124157A JP 2009124157 A JP2009124157 A JP 2009124157A JP 2010273185 A5 JP2010273185 A5 JP 2010273185A5
- Authority
- JP
- Japan
- Prior art keywords
- clock signal
- clock
- circuit
- counter
- count value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003111 delayed effect Effects 0.000 claims 2
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009124157A JP2010273185A (ja) | 2009-05-22 | 2009-05-22 | デジタルフェーズロックドループ回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009124157A JP2010273185A (ja) | 2009-05-22 | 2009-05-22 | デジタルフェーズロックドループ回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010273185A JP2010273185A (ja) | 2010-12-02 |
| JP2010273185A5 true JP2010273185A5 (enExample) | 2012-05-17 |
Family
ID=43420847
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009124157A Pending JP2010273185A (ja) | 2009-05-22 | 2009-05-22 | デジタルフェーズロックドループ回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2010273185A (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013081084A (ja) * | 2011-10-04 | 2013-05-02 | Renesas Electronics Corp | デジタルpll回路、半導体集積回路装置 |
| CN105356896B (zh) * | 2015-09-29 | 2018-02-09 | 西安空间无线电技术研究所 | 一种用于小型化Ka双频发射机的多频切换系统及方法 |
| JP7147260B2 (ja) | 2018-05-16 | 2022-10-05 | セイコーエプソン株式会社 | 回路装置、発振器、電子機器及び移動体 |
| CN112834822A (zh) * | 2020-04-30 | 2021-05-25 | 神亚科技股份有限公司 | 时序误差的检测电路 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06120812A (ja) * | 1992-10-01 | 1994-04-28 | Mitsubishi Denki Eng Kk | 半導体集積回路 |
| JPH08288798A (ja) * | 1995-04-18 | 1996-11-01 | Mitsubishi Electric Corp | 入力信号ラッチ回路 |
| US6429693B1 (en) * | 2000-06-30 | 2002-08-06 | Texas Instruments Incorporated | Digital fractional phase detector |
| US8155256B2 (en) * | 2000-10-23 | 2012-04-10 | Texas Instruments Incorporated | Method and apparatus for asynchronous clock retiming |
| JP3859531B2 (ja) * | 2002-03-22 | 2006-12-20 | Necエンジニアリング株式会社 | バーストデータ受信装置 |
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2009
- 2009-05-22 JP JP2009124157A patent/JP2010273185A/ja active Pending
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