JP2011023804A5 - 位相同期ループ回路 - Google Patents
位相同期ループ回路 Download PDFInfo
- Publication number
- JP2011023804A5 JP2011023804A5 JP2009164725A JP2009164725A JP2011023804A5 JP 2011023804 A5 JP2011023804 A5 JP 2011023804A5 JP 2009164725 A JP2009164725 A JP 2009164725A JP 2009164725 A JP2009164725 A JP 2009164725A JP 2011023804 A5 JP2011023804 A5 JP 2011023804A5
- Authority
- JP
- Japan
- Prior art keywords
- phase difference
- clock
- detected
- phase
- locked loop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Claims (1)
- 位相差信号に応じた周波数で発振する発振器と、
前記発振器の出力を分周した第1のクロックおよび前記第1のクロックよりも周波数の高い第2のクロックを生成する分周器と、
位相比較部とを備え、
前記位相比較部は、
前記第1および第2のクロックならびに参照クロックを受け、前記第1のクロックと前記参照クロックとの位相差を前記第2のクロックの周期である第1の時間の精度で検出し、検出した位相差が所定範囲内になるまで、検出した位相差に対応した前記位相差信号を出力する第1の検出部と、
前記第1のクロックおよび前記参照クロックを受け、前記第1の検出部によって検出された位相差が前記所定範囲内となってから、前記第1のクロックと前記参照クロックとの位相差を前記第1の時間よりも短い第2の時間の精度で検出し、検出した位相差に対応した前記位相差信号を出力する第2の検出部とを含む、位相同期ループ回路。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009164725A JP5256535B2 (ja) | 2009-07-13 | 2009-07-13 | 位相同期ループ回路 |
US12/790,319 US8331520B2 (en) | 2009-07-13 | 2010-05-28 | Phase-locked loop circuit and communication apparatus |
CN201010229052.8A CN101958710B (zh) | 2009-07-13 | 2010-07-12 | 锁相环电路和通信装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009164725A JP5256535B2 (ja) | 2009-07-13 | 2009-07-13 | 位相同期ループ回路 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2011023804A JP2011023804A (ja) | 2011-02-03 |
JP2011023804A5 true JP2011023804A5 (ja) | 2012-04-12 |
JP5256535B2 JP5256535B2 (ja) | 2013-08-07 |
Family
ID=43427468
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009164725A Expired - Fee Related JP5256535B2 (ja) | 2009-07-13 | 2009-07-13 | 位相同期ループ回路 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8331520B2 (ja) |
JP (1) | JP5256535B2 (ja) |
CN (1) | CN101958710B (ja) |
Families Citing this family (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2192689B1 (en) * | 2008-12-01 | 2012-01-18 | Samsung Electronics Co., Ltd. | Time-to-digital converter and all-digital phase-locked loop |
US20100225588A1 (en) * | 2009-01-21 | 2010-09-09 | Next Holdings Limited | Methods And Systems For Optical Detection Of Gestures |
US20110199387A1 (en) * | 2009-11-24 | 2011-08-18 | John David Newton | Activating Features on an Imaging Device Based on Manipulations |
WO2011066343A2 (en) * | 2009-11-24 | 2011-06-03 | Next Holdings Limited | Methods and apparatus for gesture recognition mode control |
CN102741781A (zh) * | 2009-12-04 | 2012-10-17 | 奈克斯特控股公司 | 用于位置探测的传感器方法和系统 |
US8217696B2 (en) * | 2009-12-17 | 2012-07-10 | Intel Corporation | Adaptive digital phase locked loop |
WO2012153375A1 (ja) * | 2011-05-06 | 2012-11-15 | 富士通株式会社 | クロック生成回路 |
US8471614B2 (en) * | 2011-06-14 | 2013-06-25 | Globalfoundries Singapore Pte. Ltd. | Digital phase locked loop system and method |
US8373472B2 (en) * | 2011-06-20 | 2013-02-12 | Intel Mobile Communications GmbH | Digital PLL with automatic clock alignment |
DE112011105673T5 (de) | 2011-09-28 | 2014-07-17 | Intel Corp. | Vorrichtung, System und Verfahren zur Steuerung der Temperatur- und Stromversorgungs-Spannungsdrift in einer digitalen Phasenregelungsschleife |
CN102832944A (zh) * | 2012-08-16 | 2012-12-19 | 北京航空航天大学 | 一种基于时间-相位变换法的时间数字转换器 |
US8836391B2 (en) * | 2012-10-02 | 2014-09-16 | Xilinx, Inc. | Plesiochronous clock generation for parallel wireline transceivers |
US8791733B2 (en) * | 2012-10-05 | 2014-07-29 | Intel Mobile Communications GmbH | Non-linear-error correction in fractional-N digital PLL frequency synthesizer |
US8890592B2 (en) * | 2012-10-13 | 2014-11-18 | Infineon Technologies Ag | Multi-output phase detector |
US9274889B2 (en) * | 2013-05-29 | 2016-03-01 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for data processing using global iteration result reuse |
CN103338041B (zh) * | 2013-07-16 | 2016-09-07 | 广州致远电子股份有限公司 | 同步采样时钟发生方法及电能质量分析仪 |
CN103427836A (zh) * | 2013-07-25 | 2013-12-04 | 京东方科技集团股份有限公司 | 一种频率信号发生系统和显示装置 |
EP2983290B1 (en) * | 2014-08-07 | 2017-12-20 | Nxp B.V. | Circuit for detecting phase shift applied to an RF signal |
US9141088B1 (en) * | 2014-09-17 | 2015-09-22 | Winbond Electronics Corp. | Time-to-digital converter and operation method thereof |
CN104639159B (zh) * | 2015-01-31 | 2018-01-12 | 复旦大学 | 一种超低功耗且无亚稳态的频率数字转换器 |
US9509318B2 (en) * | 2015-03-13 | 2016-11-29 | Qualcomm Incorporated | Apparatuses, methods, and systems for glitch-free clock switching |
CN107037487B (zh) * | 2016-02-04 | 2023-06-20 | 中国石油化工集团有限公司 | 一种井间电磁同步测量系统 |
KR102510515B1 (ko) | 2016-03-07 | 2023-03-16 | 삼성전자주식회사 | Sof 패턴에 기초하여 분석된 수신 특성을 참조하여 데이터를 디코딩하도록 구성되는 통신 회로 칩 및 전자 장치 |
US9584105B1 (en) * | 2016-03-10 | 2017-02-28 | Analog Devices, Inc. | Timing generator for generating high resolution pulses having arbitrary widths |
US9853807B2 (en) * | 2016-04-21 | 2017-12-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Automatic detection of change in PLL locking trend |
JP6720672B2 (ja) * | 2016-04-25 | 2020-07-08 | セイコーエプソン株式会社 | 回路装置、発振器、電子機器及び移動体 |
US10090846B2 (en) * | 2016-04-28 | 2018-10-02 | Renesas Electronics Corporation | Control apparatus |
US9746832B1 (en) | 2016-09-09 | 2017-08-29 | Samsung Electronics Co., Ltd | System and method for time-to-digital converter fine-conversion using analog-to-digital converter (ADC) |
JP6834299B2 (ja) * | 2016-09-27 | 2021-02-24 | セイコーエプソン株式会社 | 回路装置、物理量測定装置、電子機器及び移動体 |
US10128856B1 (en) * | 2017-02-28 | 2018-11-13 | Marvell International Ltd. | Digital locking loop circuit and method of operation |
US10326454B2 (en) | 2017-06-02 | 2019-06-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | All-digital phase locked loop using switched capacitor voltage doubler |
CN108055036B (zh) * | 2017-10-31 | 2020-12-29 | 北京集创北方科技股份有限公司 | 时钟数据恢复电路的环路带宽调节方法和装置 |
JP2019129496A (ja) | 2018-01-26 | 2019-08-01 | 株式会社東芝 | 送信装置及び制御方法 |
KR102534241B1 (ko) * | 2018-11-05 | 2023-05-22 | 에스케이하이닉스 주식회사 | 위상 감지 회로, 이를 포함하는 클럭 생성 회로 및 반도체 장치 |
US10608647B1 (en) * | 2018-12-14 | 2020-03-31 | Silicon Laboratories Inc. | Delay adjustment using frequency estimation |
US10841033B2 (en) * | 2019-03-01 | 2020-11-17 | Huawei Technologies Co., Ltd. | Under-sampling based receiver architecture for wireless communications systems |
US10804911B2 (en) | 2019-03-05 | 2020-10-13 | Intel Corporation | Frequency synthesis with reference signal generated by opportunistic phase locked loop |
CN111722020B (zh) * | 2019-03-18 | 2023-03-14 | 深圳市汇顶科技股份有限公司 | 毛刺检测电路 |
CN111722520B (zh) * | 2019-03-21 | 2022-04-05 | 澜起科技股份有限公司 | 一种时间数字转换器、相位差的检测方法 |
US10693475B1 (en) * | 2019-05-31 | 2020-06-23 | Silicon Laboratories Inc. | Gradual frequency transition with a frequency step |
US10727844B1 (en) | 2019-05-31 | 2020-07-28 | Silicon Laboratories Inc. | Reference clock frequency change handling in a phase-locked loop |
US10727845B1 (en) * | 2019-06-25 | 2020-07-28 | Silicon Laboratories Inc. | Use of a virtual clock in a PLL to maintain a closed loop system |
CN110708061B (zh) * | 2019-11-15 | 2022-02-15 | 复旦大学 | 一种全数字亚采样锁相环及其频率范围锁定方法 |
US10908635B1 (en) | 2019-12-24 | 2021-02-02 | Silicon Laboratories Inc. | Detection and management of frequency errors in a reference input clock signal |
TWI733415B (zh) * | 2020-04-16 | 2021-07-11 | 瑞昱半導體股份有限公司 | 鎖相迴路裝置與時脈產生方法 |
CN111654281B (zh) * | 2020-06-10 | 2023-08-04 | 上海兆芯集成电路股份有限公司 | 时数转换器 |
CN114598436B (zh) * | 2022-03-11 | 2023-08-08 | 集睿致远(厦门)科技有限公司 | 一种固定倍频的参数确定方法、装置及存储介质 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1070456A (ja) | 1996-08-28 | 1998-03-10 | Nec Corp | ディジタルpll回路 |
JP3717289B2 (ja) * | 1997-10-20 | 2005-11-16 | 富士通株式会社 | 集積回路装置 |
JP4468196B2 (ja) * | 2005-02-03 | 2010-05-26 | 富士通株式会社 | デジタルpll回路 |
EP2027653A1 (en) * | 2006-06-14 | 2009-02-25 | Telefonaktiebolaget Lm Ericsson | Frequency synthesizer |
JP4245038B2 (ja) * | 2006-11-02 | 2009-03-25 | ソニー株式会社 | Pll回路、位相制御方法、および、icチップ |
KR100852180B1 (ko) * | 2006-11-24 | 2008-08-13 | 삼성전자주식회사 | 타임투디지털컨버터 |
JP2008160594A (ja) | 2006-12-25 | 2008-07-10 | Sharp Corp | 時間デジタル変換装置およびデジタル位相同期ループ装置、受信機 |
EP2190120A4 (en) * | 2007-09-12 | 2014-06-11 | Nec Corp | JITTER SUPPRESSION SWITCHING AND JITTER SUPPRESSION METHOD |
US7583106B2 (en) * | 2007-12-14 | 2009-09-01 | Icera, Inc. | Clock circuitry |
-
2009
- 2009-07-13 JP JP2009164725A patent/JP5256535B2/ja not_active Expired - Fee Related
-
2010
- 2010-05-28 US US12/790,319 patent/US8331520B2/en not_active Expired - Fee Related
- 2010-07-12 CN CN201010229052.8A patent/CN101958710B/zh not_active Expired - Fee Related
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