JP2010272156A5 - - Google Patents

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Publication number
JP2010272156A5
JP2010272156A5 JP2009121733A JP2009121733A JP2010272156A5 JP 2010272156 A5 JP2010272156 A5 JP 2010272156A5 JP 2009121733 A JP2009121733 A JP 2009121733A JP 2009121733 A JP2009121733 A JP 2009121733A JP 2010272156 A5 JP2010272156 A5 JP 2010272156A5
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JP
Japan
Prior art keywords
rewrite
voltage
command
power supply
supply circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2009121733A
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English (en)
Japanese (ja)
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JP5348541B2 (ja
JP2010272156A (ja
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Publication date
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Priority to JP2009121733A priority Critical patent/JP5348541B2/ja
Priority claimed from JP2009121733A external-priority patent/JP5348541B2/ja
Publication of JP2010272156A publication Critical patent/JP2010272156A/ja
Publication of JP2010272156A5 publication Critical patent/JP2010272156A5/ja
Application granted granted Critical
Publication of JP5348541B2 publication Critical patent/JP5348541B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2009121733A 2009-05-20 2009-05-20 半導体装置 Expired - Fee Related JP5348541B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009121733A JP5348541B2 (ja) 2009-05-20 2009-05-20 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009121733A JP5348541B2 (ja) 2009-05-20 2009-05-20 半導体装置

Publications (3)

Publication Number Publication Date
JP2010272156A JP2010272156A (ja) 2010-12-02
JP2010272156A5 true JP2010272156A5 (cg-RX-API-DMAC7.html) 2012-04-12
JP5348541B2 JP5348541B2 (ja) 2013-11-20

Family

ID=43420066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009121733A Expired - Fee Related JP5348541B2 (ja) 2009-05-20 2009-05-20 半導体装置

Country Status (1)

Country Link
JP (1) JP5348541B2 (cg-RX-API-DMAC7.html)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012234591A (ja) * 2011-04-28 2012-11-29 Toshiba Corp 不揮発性半導体記憶装置
KR101874408B1 (ko) 2011-11-09 2018-07-05 삼성전자주식회사 비휘발성 메모리 장치 및 이를 포함하는 메모리 시스템

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02214096A (ja) * 1989-02-14 1990-08-27 Tokyo Electric Co Ltd Ｐ．ｒｏｍに対する書込制御回路
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JP3228248B2 (ja) * 1989-12-08 2001-11-12 株式会社日立製作所 不揮発性半導体記憶装置
US4975883A (en) * 1990-03-29 1990-12-04 Intel Corporation Method and apparatus for preventing the erasure and programming of a nonvolatile memory
JPH0482094A (ja) * 1990-07-24 1992-03-16 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JPH04132087A (ja) * 1990-09-21 1992-05-06 Hitachi Ltd 半導体集積回路装置
FR2694448B1 (fr) * 1992-07-31 1994-10-07 Sgs Thomson Microelectronics Dispositif de protection d'un circuit intégré contre les coupures d'alimentation.
JPH0689234A (ja) * 1992-09-07 1994-03-29 Toshiba Corp メモリモジュール
EP0631284B1 (en) * 1993-06-28 1997-09-17 STMicroelectronics S.r.l. Protection circuit for devices comprising nonvolatile memories
DE69331766D1 (de) * 1993-09-30 2002-05-02 Macronix Int Co Ltd Speisespannungsdetektorschaltung
JP4299890B2 (ja) * 1996-10-30 2009-07-22 株式会社東芝 半導体メモリ応用装置の電源供給回路
JP4302123B2 (ja) * 1997-02-26 2009-07-22 株式会社東芝 半導体集積回路装置
JPH11273370A (ja) * 1998-03-25 1999-10-08 Mitsubishi Electric Corp Ｉｃメモリ
JP3098486B2 (ja) * 1998-03-31 2000-10-16 山形日本電気株式会社 不揮発性半導体記憶装置
JP4047515B2 (ja) * 1999-05-10 2008-02-13 株式会社東芝 半導体装置
JP2001109666A (ja) * 1999-10-05 2001-04-20 Hitachi Ltd 不揮発性半導体記憶装置
JP4014801B2 (ja) * 2000-12-28 2007-11-28 株式会社ルネサステクノロジ 不揮発性メモリ装置
US6434044B1 (en) * 2001-02-16 2002-08-13 Sandisk Corporation Method and system for generation and distribution of supply voltages in memory systems
JP2004335057A (ja) * 2003-05-12 2004-11-25 Sharp Corp 誤作動防止装置付き半導体記憶装置とそれを用いた携帯電子機器
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US7187600B2 (en) * 2004-09-22 2007-03-06 Freescale Semiconductor, Inc. Method and apparatus for protecting an integrated circuit from erroneous operation
JPWO2007023544A1 (ja) * 2005-08-25 2009-03-26 スパンション エルエルシー 記憶装置、記憶装置の制御方法、および記憶制御装置の制御方法
JP2007128633A (ja) * 2005-10-07 2007-05-24 Matsushita Electric Ind Co Ltd 半導体記憶装置及びこれを備えた送受信システム
JP2008004196A (ja) * 2006-06-23 2008-01-10 Toppan Printing Co Ltd 半導体メモリ装置
JP4863865B2 (ja) * 2006-12-28 2012-01-25 富士通株式会社 情報処理装置，記憶部誤書込み防止方法，および情報処理システム
JP4996277B2 (ja) * 2007-02-09 2012-08-08 株式会社東芝 半導体記憶システム
KR100890017B1 (ko) * 2007-04-23 2009-03-25 삼성전자주식회사 프로그램 디스터브를 감소시킬 수 있는 플래시 메모리 장치및 그것의 프로그램 방법
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EP2183749B1 (en) * 2007-08-06 2013-05-29 SanDisk Technologies Inc. Enhanced write abort mechanism for non-volatile memory

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