JP2010245334A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP2010245334A JP2010245334A JP2009092973A JP2009092973A JP2010245334A JP 2010245334 A JP2010245334 A JP 2010245334A JP 2009092973 A JP2009092973 A JP 2009092973A JP 2009092973 A JP2009092973 A JP 2009092973A JP 2010245334 A JP2010245334 A JP 2010245334A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- manufacturing
- aluminum
- wafer
- item
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 77
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 53
- 229910052751 metal Inorganic materials 0.000 claims abstract description 67
- 239000002184 metal Substances 0.000 claims abstract description 67
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 60
- 238000004544 sputter deposition Methods 0.000 claims abstract description 60
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 49
- 238000000034 method Methods 0.000 claims description 63
- 230000008569 process Effects 0.000 claims description 25
- 230000004888 barrier function Effects 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 12
- 230000015572 biosynthetic process Effects 0.000 abstract description 14
- 230000007547 defect Effects 0.000 abstract description 2
- 230000009467 reduction Effects 0.000 abstract description 2
- 230000003252 repetitive effect Effects 0.000 abstract description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 18
- 239000010410 layer Substances 0.000 description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 17
- 210000004027 cell Anatomy 0.000 description 16
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 15
- 239000010936 titanium Substances 0.000 description 15
- 229910052719 titanium Inorganic materials 0.000 description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 13
- 229910052710 silicon Inorganic materials 0.000 description 13
- 239000010703 silicon Substances 0.000 description 13
- 229910052814 silicon oxide Inorganic materials 0.000 description 12
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 10
- 238000010586 diagram Methods 0.000 description 10
- 238000000137 annealing Methods 0.000 description 9
- 229910052786 argon Inorganic materials 0.000 description 9
- 239000011229 interlayer Substances 0.000 description 8
- 238000005546 reactive sputtering Methods 0.000 description 7
- 239000007789 gas Substances 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- 108010075750 P-Type Calcium Channels Proteins 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000004626 scanning electron microscopy Methods 0.000 description 4
- 229910000789 Aluminium-silicon alloy Inorganic materials 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 238000004151 rapid thermal annealing Methods 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 238000000992 sputter etching Methods 0.000 description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 230000002776 aggregation Effects 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 229910021645 metal ion Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 229910016570 AlCu Inorganic materials 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 210000000712 G cell Anatomy 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 229910008599 TiW Inorganic materials 0.000 description 1
- 229910008812 WSi Inorganic materials 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 238000005054 agglomeration Methods 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229940104869 fluorosilicate Drugs 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- 230000026683 transduction Effects 0.000 description 1
- 238000010361 transduction Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
- H01L29/66348—Vertical insulated gate bipolar transistors with a recessed gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66727—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the source electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76808—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41766—Source or drain electrodes for field effect devices with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
【解決手段】本願の一つの発明は、アスペクト比の大きい繰り返し溝等の凹部をアルミニウム系メタルで埋め込む際に、アルミニウム系メタル・シード膜の形成から埋め込みに至るまで、イオン化スパッタリングにより、実行するものである。
【選択図】図10
Description
先ず、本願において開示される発明の代表的な実施の形態について概要を説明する。
(a)半導体ウエハの第1の主面上に、第1の絶縁膜の上面から下方に向けて、凹部を形成する工程;
(b)前記凹部の内面及び前記第1の絶縁膜の前記上面に、バリア・メタル膜を形成する工程;
(c)前記工程(b)の後、スパッタリング処理チャンバ内において、前記凹部の内部を満たし、前記第1の絶縁膜の前記上面を覆うように、イオン化スパッタリングにより、アルミニウム系メタル層を形成する工程。
(c1)前記凹部の内面及び前記第1の絶縁膜の上面の前記バリア・メタル膜を覆うように、シード・アルミニウム系メタル層を形成する工程;
(c2)前記イオン化スパッタリングを続行することにより、前記シード・アルミニウム系メタル層と一体となって前記凹部の内部を満たし、前記第1の絶縁膜の前記上面を覆う前記アルミニウム系メタル層を形成する工程。
1.本願において、実施の態様の記載は、必要に応じて、便宜上複数のセクションに分けて記載する場合もあるが、特にそうでない旨明示した場合を除き、これらは相互に独立別個のものではなく、単一の例の各部分、一方が他方の一部詳細または一部または全部の変形例等である。また、原則として、同様の部分は繰り返しを省略する。また、実施の態様における各構成要素は、特にそうでない旨明示した場合、理論的にその数に限定される場合および文脈から明らかにそうでない場合を除き、必須のものではない。
実施の形態について更に詳述する。各図中において、同一または同様の部分は同一または類似の記号または参照番号で示し、説明は原則として繰り返さない。
まず、本願の一実施の形態の半導体装置の製造方法に使用するメタル成膜装置等について、簡単に説明する。図1は、本願の一実施の形態の半導体装置の製造方法に使用するマルチ・チャンバ型(クラスタ型)のウエハ処理装置の平面構成図である。
図3は、本願の一実施の形態の半導体装置の製造方法により製造されたパワーMOSFETの一例を示すデバイス上面図である。図3に示すように、正方形又は長方形の板状のシリコン系半導体基板(個々のチップに分割する前はウエハである)上に素子を形成したパワーMOSFET素子チップ8(トレンチ・ゲート・パワーMOS型半導体装置)は中央部にあるソースパッド領域11(アルミニウム系パッド)が主要な面積を占めている。その下には、それらの幅(またはピッチ)よりも十分長く延びる帯状ゲート電極(柱状トレンチ・ゲート電極に対応)と帯状ソース・コンタクト領域が交互に多数形成された帯状繰り返しデバイス・パターン領域R(リニア・セル領域)がある。より正確には、リニア・セル領域Rは、ソースパッド領域11の下方のほぼ全体に広がっており、破線で囲った部分はその一部である。このリニア・セル領域Rの周辺には、ゲート電極を周辺から外部に引き出すゲートパッド領域13がある。更にその周りには、アルミニウム・ガードリング19が設けられている。そして、チップ8の最外周部はウエハをダイシング等により分割する際の領域、すなわち、スクライブ領域14である。
このセクションでは、0.15マイクロ・メートル・プロセスのリニア・トレンチ・ゲート型パワーMOSFETの例について、図4から図11に基づいて、セクション2における図3の帯状繰り返しデバイス・パターン領域切り出し部分(リニア・セル領域)Rに対応するデバイス断面等について、プロセス・フローを説明する。
図9の状態で、図12に示すように、半導体ウエハ1のデバイス面側1aのほぼ全面に、下層バリア・メタル膜23a(チタン膜)をスパッタ成膜により、形成する。なお、図12から図14においては、凹部(ソース・コンタクト溝)22の周辺の層間絶縁膜等をひとまとめにして層間絶縁膜等の凹部周辺の部材22pとして表示する。
以上に説明した本願の一実施の形態の半導体装置の製造方法により製造したトレンチ・ゲート型のパワーMOSFETの断面形状のSEM写真を図15および図16に示す。図16は、図15の部分拡大である。図16のSEM写真中において、中心より若干上のほぼ水平に走る白い曲線が図11のアルミニウム系メタル膜24(ソース電極)の上端である。これより、前記実施形態の方法により、アスペクト比の大きな溝でも、ボイドが発生することなく、うまく充填できていることがわかる。
以上本発明者によってなされた発明を実施形態に基づいて具体的に説明したが、本願の発明はそれに限定されるものではなく、その要旨を逸脱しない範囲において種々変更可能であることは言うまでもない。
1a ウエハのデバイス面(第1の主面)
1b ウエハの裏面
1e エピタキシャル層(n型エピタキシャル層)
1s n+シリコン基板部
2 n型ドリフト領域
3 p型チャネル領域(p型ベース領域)
4 n+ソース領域
5 p+ボディ・コンタクト領域
6 トレンチ・ゲート電極(ポリシリコン電極)
7 ゲート絶縁膜
8 チップ又はチップ領域
9 レジスト膜
11 ソース・パッド
13 ゲート・パッド
14 スクライブ領域(ダイシング領域)
19 ガード・リング
21 層間絶縁膜
22p 層間絶縁膜等の凹部周辺の部材
22 凹部(ソース・コンタクト溝)
23 バリア・メタル膜
23a 下層バリア・メタル膜(チタン膜)
23b 上層バリア・メタル膜
24 アルミニウム系メタル膜(ソース電極)
24s シード・アルミニウム系メタル膜
25 シーム・パターン(縫い目パターン)
51 マルチ・チャンバ型ウエハ処理装置
52 ロード・ポート(または前室)
53 ウエハ搬送容器(ウエハ・カセット)
54 ロード・ロック室
55 真空搬送室
56 脱ガス・チャンバ
57 スパッタ・エッチング・チャンバ
58 チタン・スパッタ・チャンバ
59 窒化チタン反応性スパッタ成膜チャンバ
61 アルミニウム系メタル膜スパッタリング・チャンバ
62 下部電極(ウエハ・ステージ)
63 下部電極高周波バイアス電源(第2の高周波電力)
64 静電チャック制御系
65 静電チャック電極
66 上部電極(ターゲット・バッキング・プレート)
67 ターゲット
68 マグネット保持回転テーブル
71 マグネット(S極)
72 マグネット(N極)
73 回転軸
74 上部電極直流バイアス電源(直流バイアス)
75 上部電極高周波電源(第1の高周波電力)
76 プラズマ
77 ガス供給制御系
78 ガス供給経路
79 真空排気系
81 排気口
G セル繰り返し単位領域
L 凹部周辺拡大部
R 帯状繰り返しデバイス・パターン領域切り出し部分
Claims (12)
- 以下の工程を含む半導体装置の製造方法:
(a)半導体ウエハの第1の主面上の第1の絶縁膜の上面から下方に向けて、凹部を形成する工程;
(b)前記凹部の内面及び前記第1の絶縁膜の前記上面に、バリア・メタル膜を形成する工程;
(c)前記工程(b)の後、スパッタリング処理チャンバ内において、前記凹部の内部を満たし、前記第1の絶縁膜の前記上面を覆うように、イオン化スパッタリングにより、アルミニウム系メタル層を形成する工程。 - 前記1項の半導体装置の製造方法において、前記工程(c)は、前記スパッタリング処理チャンバ内に設けられた静電チャックを有するウエハ・ステージ上に、前記半導体ウエハの前記第1の主面を上に向けた状態で実行される。
- 前記2項の半導体装置の製造方法において、前記工程(c)は、以下の下位工程を含む:
(c1)前記凹部の内面及び前記第1の絶縁膜の上面の前記バリア・メタル膜を覆うように、シード・アルミニウム系メタル層を形成する工程;
(c2)前記イオン化スパッタリングを続行することにより、前記シード・アルミニウム系メタル層と一体となって前記凹部の内部を満たし、前記第1の絶縁膜の前記上面を覆う前記アルミニウム系メタル層を形成する工程。 - 前記3項の半導体装置の製造方法において、前記下位工程(c1)においては、前記静電チャックはオフ状態であり、前記下位工程(c2)においては、前記静電チャックはオン状態である。
- 前記4項の半導体装置の製造方法において、前記ウエハ・ステージの温度は、摂氏400度以上、440度未満である。
- 前記1項の半導体装置の製造方法において、前記スパッタリング処理チャンバは、マグネトロン方式である。
- 前記1項の半導体装置の製造方法において、前記工程(c)においては、ターゲット側に第1の高周波電力および直流バイアスが印加されている。
- 前記3項の半導体装置の製造方法において、前記下位工程(c1)においては、前記ウエハ・ステージ側の電極に第2の高周波電力によりバイアスが印加されている。
- 前記1項の半導体装置の製造方法において、半導体装置はパワーMOSFETまたはIGBTを有する。
- 前記9項の半導体装置の製造方法において、前記アルミニウム系メタル層は、前記パワーMOSFETのソース電極または前記IGBTのエミッタ電極である。
- 前記1項の半導体装置の製造方法において、前記凹部のアスペクト比は、2以上である。
- 前記1項の半導体装置の製造方法において、前記凹部は、前記半導体ウエハの基板部の内部にまで達している。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009092973A JP2010245334A (ja) | 2009-04-07 | 2009-04-07 | 半導体装置の製造方法 |
US12/718,175 US8278210B2 (en) | 2009-04-07 | 2010-03-05 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009092973A JP2010245334A (ja) | 2009-04-07 | 2009-04-07 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010245334A true JP2010245334A (ja) | 2010-10-28 |
JP2010245334A5 JP2010245334A5 (ja) | 2012-04-12 |
Family
ID=42826542
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009092973A Pending JP2010245334A (ja) | 2009-04-07 | 2009-04-07 | 半導体装置の製造方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US8278210B2 (ja) |
JP (1) | JP2010245334A (ja) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011236490A (ja) * | 2010-05-13 | 2011-11-24 | Ulvac Japan Ltd | スパッタ方法及びスパッタ装置 |
WO2012093544A1 (ja) * | 2011-01-06 | 2012-07-12 | 住友電気工業株式会社 | 半導体装置の製造方法 |
JP2012164765A (ja) * | 2011-02-04 | 2012-08-30 | Rohm Co Ltd | 半導体装置 |
JP2015135982A (ja) * | 2015-03-11 | 2015-07-27 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP2016171341A (ja) * | 2016-05-26 | 2016-09-23 | ローム株式会社 | 半導体装置 |
US10008584B2 (en) | 2011-06-28 | 2018-06-26 | Renesas Electronics Corporation | Semiconductor device, method of manufacturing the semiconductor device, and electronic device |
JP2020533793A (ja) * | 2017-09-11 | 2020-11-19 | ゼネラル・エレクトリック・カンパニイ | 半導体素子上に金属層を形成するためのスパッタリングシステムおよび方法 |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5612830B2 (ja) * | 2009-05-18 | 2014-10-22 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US20110101534A1 (en) * | 2009-11-04 | 2011-05-05 | International Business Machines Corporation | Automated short length wire shape strapping and methods of fabricting the same |
US9029220B2 (en) * | 2013-06-18 | 2015-05-12 | Infineon Technologies Austria Ag | Method of manufacturing a semiconductor device with self-aligned contact plugs and semiconductor device |
JP6455335B2 (ja) | 2015-06-23 | 2019-01-23 | 三菱電機株式会社 | 半導体装置 |
WO2017124220A1 (en) | 2016-01-18 | 2017-07-27 | Texas Instruments Incorporated | Power mosfet with metal filled deep source contact |
US20180138081A1 (en) * | 2016-11-15 | 2018-05-17 | Vanguard International Semiconductor Corporation | Semiconductor structures and method for fabricating the same |
JP2018182032A (ja) * | 2017-04-11 | 2018-11-15 | 富士電機株式会社 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
CN111933700B (zh) * | 2020-09-29 | 2021-06-11 | 中芯集成电路制造(绍兴)有限公司 | 功率半导体器件及其制造方法 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1070093A (ja) * | 1996-07-12 | 1998-03-10 | Applied Materials Inc | イオン化金属付着層を用いるアルミニウムホール充填 |
US5792522A (en) * | 1996-09-18 | 1998-08-11 | Intel Corporation | High density plasma physical vapor deposition |
JPH11200034A (ja) * | 1998-01-16 | 1999-07-27 | Anelva Corp | 高温リフロースパッタリング方法及び高温リフロースパッタリング装置 |
JP2003318395A (ja) * | 2002-04-19 | 2003-11-07 | Hitachi Ltd | 半導体装置の製造方法 |
JP2005019734A (ja) * | 2003-06-26 | 2005-01-20 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP2009506212A (ja) * | 2005-08-23 | 2009-02-12 | アプライド マテリアルズ インコーポレイテッド | ウェーハバイアス中のアルミニウムスパッタリング |
JP2010090424A (ja) * | 2008-10-07 | 2010-04-22 | Canon Anelva Corp | スパッタ成膜方法及びプラズマ処理装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5962923A (en) | 1995-08-07 | 1999-10-05 | Applied Materials, Inc. | Semiconductor device having a low thermal budget metal filling and planarization of contacts, vias and trenches |
JP2001127005A (ja) | 1999-10-28 | 2001-05-11 | Applied Materials Inc | 半導体装置の製造方法、その製造装置及び半導体装置 |
US6472291B1 (en) * | 2000-01-27 | 2002-10-29 | Infineon Technologies North America Corp. | Planarization process to achieve improved uniformity across semiconductor wafers |
US6559026B1 (en) * | 2000-05-25 | 2003-05-06 | Applied Materials, Inc | Trench fill with HDP-CVD process including coupled high power density plasma deposition |
US6461966B1 (en) * | 2001-12-14 | 2002-10-08 | Taiwan Semiconductor Manufacturing Company | Method of high density plasma phosphosilicate glass process on pre-metal dielectric application for plasma damage reducing and throughput improvement |
US7223701B2 (en) * | 2002-09-06 | 2007-05-29 | Intel Corporation | In-situ sequential high density plasma deposition and etch processing for gap fill |
JP2004247559A (ja) | 2003-02-14 | 2004-09-02 | Elpida Memory Inc | 半導体装置及びその製造方法 |
US20090246385A1 (en) * | 2008-03-25 | 2009-10-01 | Tegal Corporation | Control of crystal orientation and stress in sputter deposited thin films |
-
2009
- 2009-04-07 JP JP2009092973A patent/JP2010245334A/ja active Pending
-
2010
- 2010-03-05 US US12/718,175 patent/US8278210B2/en not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1070093A (ja) * | 1996-07-12 | 1998-03-10 | Applied Materials Inc | イオン化金属付着層を用いるアルミニウムホール充填 |
US5792522A (en) * | 1996-09-18 | 1998-08-11 | Intel Corporation | High density plasma physical vapor deposition |
JPH11200034A (ja) * | 1998-01-16 | 1999-07-27 | Anelva Corp | 高温リフロースパッタリング方法及び高温リフロースパッタリング装置 |
JP2003318395A (ja) * | 2002-04-19 | 2003-11-07 | Hitachi Ltd | 半導体装置の製造方法 |
JP2005019734A (ja) * | 2003-06-26 | 2005-01-20 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP2009506212A (ja) * | 2005-08-23 | 2009-02-12 | アプライド マテリアルズ インコーポレイテッド | ウェーハバイアス中のアルミニウムスパッタリング |
JP2010090424A (ja) * | 2008-10-07 | 2010-04-22 | Canon Anelva Corp | スパッタ成膜方法及びプラズマ処理装置 |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011236490A (ja) * | 2010-05-13 | 2011-11-24 | Ulvac Japan Ltd | スパッタ方法及びスパッタ装置 |
WO2012093544A1 (ja) * | 2011-01-06 | 2012-07-12 | 住友電気工業株式会社 | 半導体装置の製造方法 |
JP2012142522A (ja) * | 2011-01-06 | 2012-07-26 | Sumitomo Electric Ind Ltd | 半導体装置の製造方法 |
US8772139B2 (en) | 2011-01-06 | 2014-07-08 | Sumitomo Electric Industries, Ltd. | Method of manufacturing semiconductor device |
JP2012164765A (ja) * | 2011-02-04 | 2012-08-30 | Rohm Co Ltd | 半導体装置 |
US9324568B2 (en) | 2011-02-04 | 2016-04-26 | Rohm Co., Ltd. | Method of forming a semiconductor device |
US9570604B2 (en) | 2011-02-04 | 2017-02-14 | Rohm Co., Ltd. | Semiconductor device |
US10008584B2 (en) | 2011-06-28 | 2018-06-26 | Renesas Electronics Corporation | Semiconductor device, method of manufacturing the semiconductor device, and electronic device |
JP2015135982A (ja) * | 2015-03-11 | 2015-07-27 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP2016171341A (ja) * | 2016-05-26 | 2016-09-23 | ローム株式会社 | 半導体装置 |
JP2020533793A (ja) * | 2017-09-11 | 2020-11-19 | ゼネラル・エレクトリック・カンパニイ | 半導体素子上に金属層を形成するためのスパッタリングシステムおよび方法 |
JP7262448B2 (ja) | 2017-09-11 | 2023-04-21 | ゼネラル・エレクトリック・カンパニイ | 半導体素子上に金属層を形成するためのスパッタリングシステムおよび方法 |
Also Published As
Publication number | Publication date |
---|---|
US20100255677A1 (en) | 2010-10-07 |
US8278210B2 (en) | 2012-10-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5612830B2 (ja) | 半導体装置の製造方法 | |
JP2010245334A (ja) | 半導体装置の製造方法 | |
US6451690B1 (en) | Method of forming electrode structure and method of fabricating semiconductor device | |
KR20180060943A (ko) | 개구들 내에 금속 층들을 형성하기 위한 방법들 및 그것을 형성하기 위한 장치 | |
JP2011018742A (ja) | 半導体装置の製造方法 | |
US6326287B1 (en) | Semiconductor device and method of fabricating the same | |
JP2011091242A (ja) | 半導体装置の製造方法 | |
JP6929940B2 (ja) | Pvdルテニウムを使用した方法及び装置 | |
KR0147626B1 (ko) | 타이타늄 카본 나이트라이드 게이트전극 형성방법 | |
JP2010261103A (ja) | スパッタリングターゲット及びこれを利用して製造される半導体素子 | |
TWI843902B (zh) | 用於減除式自我對齊之方法及裝置 | |
JP2000311871A (ja) | 半導体装置の製造方法 | |
JP2007234667A (ja) | 半導体装置の製造方法 | |
JP2010272676A (ja) | 半導体装置の製造方法 | |
JP2002334927A (ja) | 半導体装置の製造方法 | |
KR100571402B1 (ko) | 텅스텐 플러그 상에 형성된 구리 배선층을 포함하는반도체 소자의 제조 방법 | |
TW201628196A (zh) | 金屬閘極及其製造方法 | |
US20010005628A1 (en) | Method of fabricating semiconductor device | |
JP2011249721A (ja) | 半導体装置 | |
JP3998937B2 (ja) | 銅金属化プロセスにおけるTaCNバリア層の製造方法 | |
JP5620096B2 (ja) | 半導体装置の製造方法 | |
US5994219A (en) | Add one process step to control the SI distribution of Alsicu to improved metal residue process window | |
JP2011040513A (ja) | 半導体装置の製造方法及び半導体装置 | |
JP2007250624A (ja) | 半導体装置の製造方法 | |
US20090218692A1 (en) | Barrier for Copper Integration in the FEOL |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120229 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20120229 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130425 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130529 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130617 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130802 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20140109 |