JP2009519524A5 - - Google Patents

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Publication number
JP2009519524A5
JP2009519524A5 JP2008544948A JP2008544948A JP2009519524A5 JP 2009519524 A5 JP2009519524 A5 JP 2009519524A5 JP 2008544948 A JP2008544948 A JP 2008544948A JP 2008544948 A JP2008544948 A JP 2008544948A JP 2009519524 A5 JP2009519524 A5 JP 2009519524A5
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JP
Japan
Prior art keywords
bus
peripheral device
access
master
master peripheral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008544948A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009519524A (ja
Filing date
Publication date
Priority claimed from FR0553872A external-priority patent/FR2894696A1/fr
Application filed filed Critical
Publication of JP2009519524A publication Critical patent/JP2009519524A/ja
Publication of JP2009519524A5 publication Critical patent/JP2009519524A5/ja
Pending legal-status Critical Current

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JP2008544948A 2005-12-14 2006-12-01 データ伝送バスにアクセスする方法、対応する装置およびシステム Pending JP2009519524A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0553872A FR2894696A1 (fr) 2005-12-14 2005-12-14 Procede d'acces a un bus de transmission de donnees, dispositif et systeme correspondant
PCT/EP2006/069181 WO2007068606A1 (fr) 2005-12-14 2006-12-01 Procede d'acces a un bus de transmission de donnees, dispositif et systeme correspondant.

Publications (2)

Publication Number Publication Date
JP2009519524A JP2009519524A (ja) 2009-05-14
JP2009519524A5 true JP2009519524A5 (https=) 2009-12-10

Family

ID=36889282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008544948A Pending JP2009519524A (ja) 2005-12-14 2006-12-01 データ伝送バスにアクセスする方法、対応する装置およびシステム

Country Status (7)

Country Link
US (1) US20100122000A1 (https=)
EP (1) EP1960891A1 (https=)
JP (1) JP2009519524A (https=)
KR (1) KR20080080538A (https=)
CN (1) CN101331469B (https=)
FR (1) FR2894696A1 (https=)
WO (1) WO2007068606A1 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5775101B2 (ja) * 2013-01-18 2015-09-09 日本電信電話株式会社 信号受信回路
TWI494944B (zh) * 2013-10-25 2015-08-01 Phison Electronics Corp 記憶體模組偵測方法、記憶體控制電路單元及儲存裝置
CN106610906A (zh) * 2015-10-27 2017-05-03 深圳市中兴微电子技术有限公司 一种数据访问方法及总线
US9965410B2 (en) 2016-01-21 2018-05-08 Qualcomm Incorporated Priority-based data communication over multiple communication buses
CN115454897B (zh) * 2022-09-23 2026-03-31 中电科申泰信息科技有限公司 一种改善处理器总线仲裁机制的方法

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DE69030640T2 (de) * 1989-11-03 1997-11-06 Compaq Computer Corp Multiprozessorarbitrierung in für Einzelprozessor bestimmten Arbitrierungsschemas
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US5572686A (en) * 1995-06-05 1996-11-05 Apple Computer, Inc. Bus arbitration scheme with priority switching and timer
US5862355A (en) * 1996-09-12 1999-01-19 Telxon Corporation Method and apparatus for overriding bus prioritization scheme
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US6490642B1 (en) * 1999-08-12 2002-12-03 Mips Technologies, Inc. Locked read/write on separate address/data bus using write barrier
JP2001195353A (ja) * 2000-01-06 2001-07-19 Rohm Co Ltd Dma転送システム
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US6587905B1 (en) 2000-06-29 2003-07-01 International Business Machines Corporation Dynamic data bus allocation
US6859852B2 (en) * 2000-09-08 2005-02-22 Texas Instruments Incorporated Immediate grant bus arbiter for bus system
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JP2002318782A (ja) * 2001-04-20 2002-10-31 Nec Corp バスシステム
JP3791005B2 (ja) * 2001-11-20 2006-06-28 日本電気株式会社 バスアクセス調停装置及びバスアクセス調停方法
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JP2003256358A (ja) * 2002-02-28 2003-09-12 Sony Corp アービタ装置及び方法、並びに、リソース共有システム
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KR101089324B1 (ko) * 2004-02-20 2011-12-02 삼성전자주식회사 복수의 마스터들을 포함하는 서브 시스템을 개방형 코어프로토콜을 기반으로 하는 버스에 연결하기 위한 버스시스템
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US20060026329A1 (en) * 2004-07-30 2006-02-02 Yu James K System and method for an arbiter rewind
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