JP2009513019A - パッケージのクロストークおよび損失を低減した半導体装置 - Google Patents

パッケージのクロストークおよび損失を低減した半導体装置 Download PDF

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Publication number
JP2009513019A
JP2009513019A JP2008536797A JP2008536797A JP2009513019A JP 2009513019 A JP2009513019 A JP 2009513019A JP 2008536797 A JP2008536797 A JP 2008536797A JP 2008536797 A JP2008536797 A JP 2008536797A JP 2009513019 A JP2009513019 A JP 2009513019A
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Japan
Prior art keywords
die
buffer region
dielectric constant
sealing resin
loss tangent
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JP2008536797A
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Japanese (ja)
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JP2009513019A5 (enExample
Inventor
ダブリュ． コンディー、ブライアン
マハリンガム、マリ
ケイ． シャー、マヘシュ
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NXP USA Inc
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NXP USA Inc
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Pending legal-status Critical Current

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    • H10W74/121—
    • H10W40/778—
    • H10W74/473—
    • H10W76/10—
    • H10W72/0198—
    • H10W72/932—
    • H10W74/00—
    • H10W90/756—

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2008536797A 2005-10-24 2006-10-18 パッケージのクロストークおよび損失を低減した半導体装置 Pending JP2009513019A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/257,802 US7435625B2 (en) 2005-10-24 2005-10-24 Semiconductor device with reduced package cross-talk and loss
PCT/US2006/040869 WO2007050420A2 (en) 2005-10-24 2006-10-18 Semiconductor device with reduced package cross-talk and loss

Publications (2)

Publication Number Publication Date
JP2009513019A true JP2009513019A (ja) 2009-03-26
JP2009513019A5 JP2009513019A5 (enExample) 2009-11-26

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ID=37968396

Family Applications (1)

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JP2008536797A Pending JP2009513019A (ja) 2005-10-24 2006-10-18 パッケージのクロストークおよび損失を低減した半導体装置

Country Status (5)

Country Link
US (2) US7435625B2 (enExample)
JP (1) JP2009513019A (enExample)
KR (1) KR101296701B1 (enExample)
TW (1) TWI414046B (enExample)
WO (1) WO2007050420A2 (enExample)

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JP4870509B2 (ja) * 2006-09-27 2012-02-08 新光電気工業株式会社 電子装置
DE102009026804A1 (de) * 2009-06-08 2010-12-09 Robert Bosch Gmbh Verfahren zur Herstellung elektronischer Bauteile
JP5018909B2 (ja) * 2009-06-30 2012-09-05 株式会社デンソー 半導体装置
JP2011054806A (ja) * 2009-09-02 2011-03-17 Renesas Electronics Corp 半導体装置およびその製造方法
WO2011139845A2 (en) * 2010-04-28 2011-11-10 Hoya Corporation Usa Cross-talk reduction in a bidirectional optoelectronic device
JP5532419B2 (ja) * 2010-06-17 2014-06-25 富士電機株式会社 絶縁材、金属ベース基板および半導体モジュール並びにこれらの製造方法
CN102714542B (zh) * 2010-06-25 2015-08-19 Hoya美国公司 双向光电子设备中的串扰减小
KR20120000805A (ko) 2010-06-28 2012-01-04 삼성전자주식회사 반도체 패키지의 몰딩 방법
CN102714555B (zh) * 2010-09-06 2016-06-15 华为技术有限公司 双向光电子设备中的串扰减小
WO2013063410A1 (en) 2011-10-28 2013-05-02 Hoya Corporation Usa Optical waveguide splitter on a waveguide substrate for attenuating a light source
US9490041B2 (en) 2012-03-27 2016-11-08 3M Innovative Properties Company Composite particles comprising a conductive coating of PEDOT/PSS, methods of making, and articles including the same
KR101905893B1 (ko) * 2012-06-13 2018-10-08 에스케이하이닉스 주식회사 복수의 유전층을 포함하는 임베디드 패키지 및 제조 방법
US9226428B2 (en) * 2012-06-28 2015-12-29 Intel Corporation High heat capacity electronic components and methods for fabricating
US20140103508A1 (en) * 2012-10-11 2014-04-17 Texas Instruments Incorporated Encapsulating package for an integrated circuit
EP2731130A1 (en) * 2012-11-12 2014-05-14 Nxp B.V. Cavity package for an integrated circuit
US9312231B2 (en) * 2013-10-31 2016-04-12 Freescale Semiconductor, Inc. Method and apparatus for high temperature semiconductor device packages and structures using a low temperature process
US9461005B2 (en) * 2015-02-12 2016-10-04 Ampleon Netherlands B.V. RF package with non-gaseous dielectric material
US10431526B2 (en) * 2017-10-09 2019-10-01 Cree, Inc. Rivetless lead fastening for a semiconductor package
US10897824B2 (en) * 2017-10-30 2021-01-19 Baker Hughes, A Ge Company, Llc Encapsulation of downhole microelectronics and method the same
US11410898B2 (en) * 2017-10-31 2022-08-09 Nagase Chemtex Corporation Manufacturing method of mounting structure, and sheet therefor
US10446414B2 (en) * 2017-12-22 2019-10-15 Texas Instruments Incorporated Semiconductor package with filler particles in a mold compound
US10672703B2 (en) 2018-09-26 2020-06-02 Nxp Usa, Inc. Transistor with shield structure, packaged device, and method of fabrication

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JPH05283561A (ja) * 1992-03-30 1993-10-29 Nec Corp 樹脂封止型半導体装置

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Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
JPS6379353A (ja) * 1986-09-24 1988-04-09 Hitachi Ltd 樹脂封止型半導体装置
JPH05283561A (ja) * 1992-03-30 1993-10-29 Nec Corp 樹脂封止型半導体装置

Also Published As

Publication number Publication date
US20070090542A1 (en) 2007-04-26
WO2007050420A3 (en) 2007-08-30
WO2007050420A2 (en) 2007-05-03
KR101296701B1 (ko) 2013-08-20
US7435625B2 (en) 2008-10-14
US20090001614A1 (en) 2009-01-01
KR20080065980A (ko) 2008-07-15
TW200729427A (en) 2007-08-01
US7701074B2 (en) 2010-04-20
TWI414046B (zh) 2013-11-01

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