JP2009289865A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP2009289865A
JP2009289865A JP2008139131A JP2008139131A JP2009289865A JP 2009289865 A JP2009289865 A JP 2009289865A JP 2008139131 A JP2008139131 A JP 2008139131A JP 2008139131 A JP2008139131 A JP 2008139131A JP 2009289865 A JP2009289865 A JP 2009289865A
Authority
JP
Japan
Prior art keywords
metal layer
columnar electrode
resist film
plating resist
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008139131A
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English (en)
Japanese (ja)
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JP2009289865A5 (https=
Inventor
Yoshiyuki Suzuki
美之 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP2008139131A priority Critical patent/JP2009289865A/ja
Publication of JP2009289865A publication Critical patent/JP2009289865A/ja
Publication of JP2009289865A5 publication Critical patent/JP2009289865A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2008139131A 2008-05-28 2008-05-28 半導体装置の製造方法 Pending JP2009289865A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008139131A JP2009289865A (ja) 2008-05-28 2008-05-28 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008139131A JP2009289865A (ja) 2008-05-28 2008-05-28 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2009289865A true JP2009289865A (ja) 2009-12-10
JP2009289865A5 JP2009289865A5 (https=) 2011-05-26

Family

ID=41458819

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008139131A Pending JP2009289865A (ja) 2008-05-28 2008-05-28 半導体装置の製造方法

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JP (1) JP2009289865A (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011181860A (ja) * 2010-03-04 2011-09-15 Casio Computer Co Ltd 半導体装置及び半導体装置の製造方法
CN115087226A (zh) * 2021-03-16 2022-09-20 揖斐电株式会社 印刷电路板的制造方法和用于实施该方法的层压系统
JP2022165222A (ja) * 2021-04-19 2022-10-31 イビデン株式会社 プリント配線板の製造方法、その方法の実施に用いられるラミネートロールおよびラミネートシステム

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0248077A (ja) * 1988-08-09 1990-02-16 Nissan Motor Co Ltd マスキング被膜形成方法
JPH06333931A (ja) * 1993-05-20 1994-12-02 Nippondenso Co Ltd 半導体装置における微細電極の製造方法
JPH07125071A (ja) * 1993-11-02 1995-05-16 Fuji Photo Film Co Ltd 減圧貼付け装置
JPH11327164A (ja) * 1998-05-08 1999-11-26 Nippon Synthetic Chem Ind Co Ltd:The 画像形成方法
JP2004235612A (ja) * 2003-01-08 2004-08-19 Shinko Electric Ind Co Ltd 半導体装置の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0248077A (ja) * 1988-08-09 1990-02-16 Nissan Motor Co Ltd マスキング被膜形成方法
JPH06333931A (ja) * 1993-05-20 1994-12-02 Nippondenso Co Ltd 半導体装置における微細電極の製造方法
JPH07125071A (ja) * 1993-11-02 1995-05-16 Fuji Photo Film Co Ltd 減圧貼付け装置
JPH11327164A (ja) * 1998-05-08 1999-11-26 Nippon Synthetic Chem Ind Co Ltd:The 画像形成方法
JP2004235612A (ja) * 2003-01-08 2004-08-19 Shinko Electric Ind Co Ltd 半導体装置の製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011181860A (ja) * 2010-03-04 2011-09-15 Casio Computer Co Ltd 半導体装置及び半導体装置の製造方法
CN115087226A (zh) * 2021-03-16 2022-09-20 揖斐电株式会社 印刷电路板的制造方法和用于实施该方法的层压系统
JP2022142042A (ja) * 2021-03-16 2022-09-30 イビデン株式会社 プリント配線板の製造方法およびその方法の実施に用いられるラミネートシステム
US12513828B2 (en) 2021-03-16 2025-12-30 Ibiden Co., Ltd. Method for manufacturing printed wiring board
JP2022165222A (ja) * 2021-04-19 2022-10-31 イビデン株式会社 プリント配線板の製造方法、その方法の実施に用いられるラミネートロールおよびラミネートシステム

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