JP2009212492A - パッケージ基板の製造方法及び半導体パッケージの製造方法 - Google Patents
パッケージ基板の製造方法及び半導体パッケージの製造方法 Download PDFInfo
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- JP2009212492A JP2009212492A JP2008267440A JP2008267440A JP2009212492A JP 2009212492 A JP2009212492 A JP 2009212492A JP 2008267440 A JP2008267440 A JP 2008267440A JP 2008267440 A JP2008267440 A JP 2008267440A JP 2009212492 A JP2009212492 A JP 2009212492A
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- bump
- chip
- solder
- manufacturing
- jig
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 76
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 52
- 239000000758 substrate Substances 0.000 title claims abstract description 48
- 229910000679 solder Inorganic materials 0.000 claims abstract description 157
- 238000000034 method Methods 0.000 claims description 40
- 238000003825 pressing Methods 0.000 claims description 6
- 238000004806 packaging method and process Methods 0.000 claims description 4
- 238000007731 hot pressing Methods 0.000 abstract 1
- 230000008569 process Effects 0.000 description 17
- 238000010586 diagram Methods 0.000 description 12
- 239000002184 metal Substances 0.000 description 7
- 238000007747 plating Methods 0.000 description 5
- 230000009471 action Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000000844 transformation Methods 0.000 description 1
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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Abstract
【解決手段】チップバンプの形成された半導体チップが実装されるパッケージ基板を製造する方法であって、電極パッドが形成された回路基板を提供する段階S100と、電極パッドにハンダバンプを形成する段階S200と、チップバンプの形状に対応して凸部または凹部が形成された治具の凸部または凹部をハンダバンプに対向するようにして、治具を基板に熱加圧S300する段階と、治具を離型する段階と、を含むことを特徴とする。
【選択図】図5
Description
14 回路パターン
16 電極パッド
18 ハンダバンプ
20 ドーム状の溝
22 治具
24 ポストバンプ
26 半導体チップ
28 針型バンプ
30 スクラッチ
32 円錐状凸部
34 噴火口状の凸部
Claims (14)
- チップバンプの形成された半導体チップが実装されるパッケージ基板を製造する方法であって、
電極パッドが形成された回路基板を提供する段階と、
前記電極パッドにハンダバンプ(solder bump)を形成する段階と、
前記チップバンプの形状に対応して凸部または凹部が形成された治具(jig)の前記凸部または前記凹部が前記ハンダバンプに対向するようにして、前記治具を前記回路基板に熱加圧する段階と、
前記治具を離型する段階と、
を含むパッケージ基板の製造方法。 - 前記治具を離型する段階以前に、
前記ハンダバンプを硬化する段階をさらに含む請求項1に記載のパッケージ基板の製造方法。 - 前記ハンダバンプを形成する段階が、
前記ハンダバンプに対応する、開口部が形成されたマスクを前記回路基板に載置する段階と、
ハンダペーストをスクィージングして前記開口部に圧入する段階と、
前記ハンダペーストをリフロー(reflow)する段階と、
前記マスクを除去する段階と、
を含むことを特徴とする請求項1または請求項2に記載のパッケージ基板の製造方法。 - 前記チップバンプの先端が平らなポストバンプであり、
前記凹部が、
ドーム状の溝であることを特徴とする請求項1から請求項3の何れかに記載のパッケージ基板の製造方法。 - 前記チップバンプの先端が平らなポストバンプであり、
前記凹部が、
スクラッチ(scratch)状の溝であることを特徴とする請求項1から請求項4の何れかに記載のパッケージ基板の製造方法。 - 前記チップバンプが、先端に円錐状突起が形成された針型バンプであり、
前記凸部が、
前記突起に対応する円錐状の凸部であることを特徴とする請求項1から請求項5の何れかに記載のパッケージ基板の製造方法。 - 前記チップバンプの先端が平らなポストバンプであり、
前記凸部が、
中央部が凹んだ噴火口状の凸部であることを特徴とする請求項1から請求項6の何れかに記載のパッケージ基板の製造方法。 - チップバンプの形成された半導体チップをパッケージ基板に実装してパッケージする方法であって、
電極パッドが形成された回路基板を提供する段階と、
前記電極パッドにハンダバンプを形成する段階と、
前記チップバンプの形状に対応して凸部または凹部が形成された治具の前記凸部または前記凹部が前記ハンダバンプに対向するようにして、前記治具を前記回路基板に熱加圧する段階と、
前記治具を離型する段階と、
前記チップバンプと前記ハンダバンプとが対応するようにして前記半導体チップを前記回路基板に実装する段階と、
前記ハンダバンプをリフローして前記チップバンプと前記ハンダバンプとをボンディングする段階と、
を含む半導体パッケージの製造方法。 - 前記治具を離型する段階以前に、
前記ハンダバンプを硬化する段階をさらに含む請求項8に記載の半導体パッケージの製造方法。 - 前記ハンダバンプを形成する段階が、
前記ハンダバンプに対応する、開口部が形成されたマスクを前記回路基板に載置する段階と、
ハンダペーストをスクィージングして前記開口部に圧入する段階と、
前記ハンダペーストをリフローする段階と、
前記マスクを除去する段階と、
を含むことを特徴とする請求項8または請求項9に記載の半導体パッケージの製造方法。 - 前記チップバンプの先端が平らなポストバンプであり、
前記凹部が、
ドーム状の溝であることを特徴とする請求項8から請求項10の何れかに記載の半導体パッケージの製造方法。 - 前記チップバンプの先端が平らなポストバンプであり、
前記凹部が、
スクラッチ状の溝であることを特徴とする請求項8から請求項11の何れかに記載の半導体パッケージの製造方法。 - 前記チップバンプが、その先端に円錐状突起が形成された針型バンプであり、
前記凸部が、
前記突起に対応する円錐状凸部であることを特徴とする請求項8から請求項12の何れかに記載の半導体パッケージの製造方法。 - 前記チップバンプの先端が平らなポストバンプであり、
前記凸部が、
中央部が凹んだ噴火口状の凸部であることを特徴とする請求項8から請求項13の何れかに記載の半導体パッケージの製造方法。
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JP2013098701A (ja) * | 2011-10-31 | 2013-05-20 | Daishinku Corp | 圧電振動デバイスおよび圧電振動デバイスの製造方法 |
US9520544B2 (en) | 2014-09-30 | 2016-12-13 | Nichia Corporation | Light source including ceramic substrate mounted on mounting substrate |
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JPH06232205A (ja) * | 1992-12-11 | 1994-08-19 | Fujitsu Ltd | 半導体装置の実装方法と半導体装置 |
JP2001144143A (ja) * | 1999-11-17 | 2001-05-25 | Nippon Avionics Co Ltd | フリップチップ実装方法 |
JP2005019961A (ja) * | 1998-03-12 | 2005-01-20 | Fujitsu Ltd | 電子部品用コンタクタの製造方法及びコンタクタ製造装置 |
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JP2006351589A (ja) * | 2005-06-13 | 2006-12-28 | Sony Corp | 半導体チップ、電子装置及びその製造方法 |
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US9520544B2 (en) | 2014-09-30 | 2016-12-13 | Nichia Corporation | Light source including ceramic substrate mounted on mounting substrate |
US10833235B2 (en) | 2014-09-30 | 2020-11-10 | Nichia Corporation | Light source, method of manufacturing the light source, and method of mounting the light source |
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JP4934831B2 (ja) | 2012-05-23 |
TW201001576A (en) | 2010-01-01 |
KR20090094698A (ko) | 2009-09-08 |
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